drm/msm: fix HZ dependency of timeout
authorNicholas Mc Guire <hofrat@osadl.org>
Sat, 4 Apr 2015 02:39:08 +0000 (04:39 +0200)
committerRob Clark <robdclark@gmail.com>
Thu, 11 Jun 2015 17:11:02 +0000 (13:11 -0400)
The timeout is passed as a constant which makes it HZ dependent because
jiffies are expected so it should be converted to jiffies. The actual
value is not clear from the code - my best guess is that this should be
300 milliseconds given that other timeouts are in milliseconds based on
looking at other drm drivers (e.g. exynos_drm_dsi.c:356 300ms,
tegra/dpaux.c:188 250ms) - this needs to be confirmed by someone who
knows the details of the driver.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/edp/edp_aux.c

index 5f77bf0adf1d10ff519acd6e79e290de1cdd64c7..d950839edf915199f586b5aca7115862b4f5a4b8 100644 (file)
@@ -148,7 +148,8 @@ ssize_t edp_aux_transfer(struct drm_dp_aux *drm_aux, struct drm_dp_aux_msg *msg)
                goto unlock_exit;
 
        DBG("wait_for_completion");
-       time_left = wait_for_completion_timeout(&aux->msg_comp, 300);
+       time_left = wait_for_completion_timeout(&aux->msg_comp,
+                                               msecs_to_jiffies(300));
        if (!time_left) {
                /*
                 * Clear GO and reset AUX channel