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ARM: STi: DT: Add support for stih418 A9 pll
authorGabriel Fernandez <gabriel.fernandez@linaro.org>
Wed, 7 Oct 2015 09:08:00 +0000 (11:08 +0200)
committerMaxime Coquelin <maxime.coquelin@st.com>
Thu, 15 Oct 2015 11:48:16 +0000 (13:48 +0200)
Add support for new PLL-type for stih418 A9-PLL.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
arch/arm/boot/dts/stih418-clock.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index 148e1772465f7f6f04995641f2b206d4de29eb10..ae6d9978ea19ad88a0c5bfcdee2d3129bc1c0ee0 100644 (file)
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -44,7 +44,7 @@
 
                        clockgen_a9_pll: clockgen-a9-pll {
                                #clock-cells = <1>;
-                               compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+                               compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32";
 
                                clocks = <&clk_sysin>;