clk: renesas: r8a7795: add PWM clock

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index b2198aef5ed4291291d30ca1df3cc2ba5ab5c9a0..9de458a6f7c88b518d6edc14e9050717523e0a90 100644 (file)
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -148,6 +148,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
        DEF_MOD("hscif2",                518,   R8A7795_CLK_S3D1),
        DEF_MOD("hscif1",                519,   R8A7795_CLK_S3D1),
        DEF_MOD("hscif0",                520,   R8A7795_CLK_S3D1),
+       DEF_MOD("pwm",                   523,   R8A7795_CLK_S3D4),
        DEF_MOD("fcpvd3",                600,   R8A7795_CLK_S2D1),
        DEF_MOD("fcpvd2",                601,   R8A7795_CLK_S2D1),
        DEF_MOD("fcpvd1",                602,   R8A7795_CLK_S2D1),