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[MIPS] MT: Initialise all writable bits in Cause register to zero.
author
Chris Dearman
<chris@mips.com>
Mon, 7 Aug 2006 14:08:01 +0000
(15:08 +0100)
committer
Ralf Baechle
<ralf@linux-mips.org>
Wed, 27 Sep 2006 12:37:33 +0000
(13:37 +0100)
Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an
immediate exception when starting the second VPE.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/smp-mt.c
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diff --git
a/arch/mips/kernel/smp-mt.c
b/arch/mips/kernel/smp-mt.c
index 93429a4d301296d2b550ce34d8f254ea93aaa8aa..766253c44f3fd8d3dcae954755702e13bb78506a 100644
(file)
--- a/
arch/mips/kernel/smp-mt.c
+++ b/
arch/mips/kernel/smp-mt.c
@@
-203,7
+203,7
@@
void plat_smp_setup(void)
write_vpe_c0_config( read_c0_config());
/* make sure there are no software interrupts pending */
- write_vpe_c0_cause(
read_vpe_c0_cause() & ~(C_SW1|C_SW0)
);
+ write_vpe_c0_cause(
0
);
/* Propagate Config7 */
write_vpe_c0_config7(read_c0_config7());