ARM: at91/dts: correct comment in at91sam9x5.dtsi for mii
authorDouglas Gilbert <dgilbert@interlog.com>
Wed, 23 Jan 2013 08:50:02 +0000 (09:50 +0100)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Wed, 23 Jan 2013 09:40:51 +0000 (10:40 +0100)
Concerning pinctrl_macb0_rmii_mii, values were okay, but not comments.

Signed-off-by: Douglas Gilbert <dgilbert@interlog.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/boot/dts/at91sam9x5.dtsi

index cb711a5f25036ae1cc23f6d774ab822d211a7ef0..8ecca6948d811f827e623e48f039238dad9fe6bf 100644 (file)
 
                                        pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
                                                atmel,pins =
-                                                       <1 8 0x1 0x0    /* PA8 periph A */
-                                                        1 11 0x1 0x0   /* PA11 periph A */
-                                                        1 12 0x1 0x0   /* PA12 periph A */
-                                                        1 13 0x1 0x0   /* PA13 periph A */
-                                                        1 14 0x1 0x0   /* PA14 periph A */
-                                                        1 15 0x1 0x0   /* PA15 periph A */
-                                                        1 16 0x1 0x0   /* PA16 periph A */
-                                                        1 17 0x1 0x0>; /* PA17 periph A */
+                                                       <1 8 0x1 0x0    /* PB8 periph A */
+                                                        1 11 0x1 0x0   /* PB11 periph A */
+                                                        1 12 0x1 0x0   /* PB12 periph A */
+                                                        1 13 0x1 0x0   /* PB13 periph A */
+                                                        1 14 0x1 0x0   /* PB14 periph A */
+                                                        1 15 0x1 0x0   /* PB15 periph A */
+                                                        1 16 0x1 0x0   /* PB16 periph A */
+                                                        1 17 0x1 0x0>; /* PB17 periph A */
                                        };
                                };