drm/amdgpu: reset wptr at cp compute resume (v2)

This patch is to resolve compute hang at resume time.

v2: (agd5f) squash in second fix

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 7683d7fd64631dc11350ddfab73880fbe42be509..7b683fb2173c728fff760c926f1204b3897b4eae 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -3144,6 +3144,12 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
                WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
                       mqd->cp_hqd_pq_doorbell_control);
 
+               /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */
+               ring->wptr = 0;
+               mqd->cp_hqd_pq_wptr = ring->wptr;
+               WREG32(mmCP_HQD_PQ_WPTR, mqd->cp_hqd_pq_wptr);
+               mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR);
+
                /* set the vmid for the queue */
                mqd->cp_hqd_vmid = 0;
                WREG32(mmCP_HQD_VMID, mqd->cp_hqd_vmid);