Revert "drm/radeon/kms: add a new gem_wait ioctl with read/write flags"
authorDave Airlie <airlied@redhat.com>
Thu, 27 Oct 2011 16:15:10 +0000 (18:15 +0200)
committerDave Airlie <airlied@redhat.com>
Thu, 27 Oct 2011 16:15:10 +0000 (18:15 +0200)
This reverts commit d3ed74027f1dd197b7e08247a40d3bf9be1852b0.

Further upstream discussion between Thomas and Marek decided this needed
more work and driver specifics. So revert before it goes upstream.

Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_cs.c
drivers/gpu/drm/radeon/radeon_drv.c
drivers/gpu/drm/radeon/radeon_gem.c
drivers/gpu/drm/radeon/radeon_kms.c
drivers/gpu/drm/radeon/radeon_object.c
drivers/gpu/drm/radeon/radeon_object.h
include/drm/radeon_drm.h

index 156b8b7e028e73b3f2b8d6f9761e91df242e15b5..e3170c794c1d98ba58fcc02cb6a94e8d2cf4533c 100644 (file)
@@ -1142,8 +1142,6 @@ int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
                                struct drm_file *filp);
 int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
                                struct drm_file *filp);
-int radeon_gem_wait_ioctl(struct drm_device *dev, void *data,
-                         struct drm_file *filp);
 
 /* VRAM scratch page for HDP bug */
 struct r700_vram_scratch {
index f0b9066abc5c73cbed7314270522473d7c7f612e..14e8531511057e5ecca25da1f8fe0afd8fde45c1 100644 (file)
@@ -80,10 +80,7 @@ int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
                        p->relocs[i].lobj.wdomain = r->write_domain;
                        p->relocs[i].lobj.rdomain = r->read_domains;
                        p->relocs[i].lobj.tv.bo = &p->relocs[i].robj->tbo;
-                       if (r->read_domains)
-                               p->relocs[i].lobj.tv.usage |= TTM_USAGE_READ;
-                       if (r->write_domain)
-                               p->relocs[i].lobj.tv.usage |= TTM_USAGE_WRITE;
+                       p->relocs[i].lobj.tv.usage = TTM_USAGE_READWRITE;
                        p->relocs[i].handle = r->handle;
                        p->relocs[i].flags = r->flags;
                        radeon_bo_list_add_object(&p->relocs[i].lobj,
index bd187e097e77571ea960e9d15f0c4fe97e55c4b3..e71d2ed7fa113126e7cacb06b1553f8767b948e6 100644 (file)
  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  *   2.10.0 - fusion 2D tiling
  *   2.11.0 - backend map, initial compute support for the CS checker
- *   2.12.0 - DRM_RADEON_GEM_WAIT ioctl
  */
 #define KMS_DRIVER_MAJOR       2
-#define KMS_DRIVER_MINOR       12
+#define KMS_DRIVER_MINOR       11
 #define KMS_DRIVER_PATCHLEVEL  0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);
index 2edc2a40d4d7b5b0b220ff225bc6e1f9200ed79b..aa1ca2dea42f1623f09c062e4c9171e220c75c0d 100644 (file)
@@ -122,7 +122,7 @@ int radeon_gem_set_domain(struct drm_gem_object *gobj,
        }
        if (domain == RADEON_GEM_DOMAIN_CPU) {
                /* Asking for cpu access wait for object idle */
-               r = radeon_bo_wait(robj, NULL, false, TTM_USAGE_READWRITE);
+               r = radeon_bo_wait(robj, NULL, false);
                if (r) {
                        printk(KERN_ERR "Failed to wait for object !\n");
                        return r;
@@ -273,7 +273,7 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
                return -ENOENT;
        }
        robj = gem_to_radeon_bo(gobj);
-       r = radeon_bo_wait(robj, &cur_placement, true, TTM_USAGE_READWRITE);
+       r = radeon_bo_wait(robj, &cur_placement, true);
        switch (cur_placement) {
        case TTM_PL_VRAM:
                args->domain = RADEON_GEM_DOMAIN_VRAM;
@@ -303,7 +303,7 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
                return -ENOENT;
        }
        robj = gem_to_radeon_bo(gobj);
-       r = radeon_bo_wait(robj, NULL, false, TTM_USAGE_READWRITE);
+       r = radeon_bo_wait(robj, NULL, false);
        /* callback hw specific functions if any */
        if (robj->rdev->asic->ioctl_wait_idle)
                robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
@@ -311,36 +311,6 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
        return r;
 }
 
-int radeon_gem_wait_ioctl(struct drm_device *dev, void *data,
-                         struct drm_file *filp)
-{
-       struct drm_radeon_gem_wait *args = data;
-       struct drm_gem_object *gobj;
-       struct radeon_bo *robj;
-       bool no_wait = (args->flags & RADEON_GEM_NO_WAIT) != 0;
-       enum ttm_buffer_usage usage = 0;
-       int r;
-
-       if (args->flags & RADEON_GEM_USAGE_READ)
-               usage |= TTM_USAGE_READ;
-       if (args->flags & RADEON_GEM_USAGE_WRITE)
-               usage |= TTM_USAGE_WRITE;
-       if (!usage)
-               usage = TTM_USAGE_READWRITE;
-
-       gobj = drm_gem_object_lookup(dev, filp, args->handle);
-       if (gobj == NULL) {
-               return -ENOENT;
-       }
-       robj = gem_to_radeon_bo(gobj);
-       r = radeon_bo_wait(robj, NULL, no_wait, usage);
-       /* callback hw specific functions if any */
-       if (!no_wait && robj->rdev->asic->ioctl_wait_idle)
-               robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
-       drm_gem_object_unreference_unlocked(gobj);
-       return r;
-}
-
 int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
                                struct drm_file *filp)
 {
index a749c262663fa875a6ba6e6357901f0e0f4ebe63..be2c1224e68ae073f36a971f531d052a8bf2a9e5 100644 (file)
@@ -451,6 +451,5 @@ struct drm_ioctl_desc radeon_ioctls_kms[] = {
        DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
        DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
        DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
-       DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT, radeon_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED),
 };
 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);
index 138839312e8b6b2f0dcbfbcfe35e1a963b8e2c5b..b8f75f5d344bcb2ef22232388af8ec532386bad9 100644 (file)
@@ -516,8 +516,7 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
        return 0;
 }
 
-int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, bool no_wait,
-                  enum ttm_buffer_usage usage)
+int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, bool no_wait)
 {
        int r;
 
@@ -528,7 +527,7 @@ int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type, bool no_wait,
        if (mem_type)
                *mem_type = bo->tbo.mem.mem_type;
        if (bo->tbo.sync_obj)
-               r = ttm_bo_wait(&bo->tbo, true, true, no_wait, usage);
+               r = ttm_bo_wait(&bo->tbo, true, true, no_wait, false);
        spin_unlock(&bo->tbo.bdev->fence_lock);
        ttm_bo_unreserve(&bo->tbo);
        return r;
index c6c8e43e6d9aa68bfd70ca2ea4f720f5ec8a3fa0..b07f0f9b86277a76bc1b9386bec73e1b53e1b5fb 100644 (file)
@@ -98,7 +98,7 @@ static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
 }
 
 extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
-                         bool no_wait, enum ttm_buffer_usage usage);
+                         bool no_wait);
 
 extern int radeon_bo_create(struct radeon_device *rdev,
                                unsigned long size, int byte_align,
index 939b8547cc2653407e4fafae82faafcd25463012..b65be6054a183efe7b0ea5daa7c8afd7b1aa6a72 100644 (file)
@@ -509,7 +509,6 @@ typedef struct {
 #define DRM_RADEON_GEM_SET_TILING      0x28
 #define DRM_RADEON_GEM_GET_TILING      0x29
 #define DRM_RADEON_GEM_BUSY            0x2a
-#define DRM_RADEON_GEM_WAIT            0x2b
 
 #define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
 #define DRM_IOCTL_RADEON_CP_START   DRM_IO(  DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@@ -551,7 +550,6 @@ typedef struct {
 #define DRM_IOCTL_RADEON_GEM_SET_TILING        DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
 #define DRM_IOCTL_RADEON_GEM_GET_TILING        DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
 #define DRM_IOCTL_RADEON_GEM_BUSY      DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)
-#define DRM_IOCTL_RADEON_GEM_WAIT      DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT, struct drm_radeon_gem_wait)
 
 typedef struct drm_radeon_init {
        enum {
@@ -848,15 +846,6 @@ struct drm_radeon_gem_busy {
        uint32_t        domain;
 };
 
-#define RADEON_GEM_NO_WAIT     0x1
-#define RADEON_GEM_USAGE_READ  0x2
-#define RADEON_GEM_USAGE_WRITE 0x4
-
-struct drm_radeon_gem_wait {
-       uint32_t        handle;
-       uint32_t        flags;  /* one of RADEON_GEM_* */
-};
-
 struct drm_radeon_gem_pread {
        /** Handle for the object being read. */
        uint32_t handle;