Rephrase comment to explain original intention of function.
CC: Lidza Louina <lidza.louina@gmail.com>
CC: Mark Hounschell <markh@compro.net>
Suggested-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Seunghun Lee <waydi1@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* For complete POSIX compatibility, we should be purging the
* read FIFO in the UART here.
*
- * However, doing the statement below also incorrectly flushes
- * write data as well as just basically trashing the FIFO.
+ * However, clearing the read FIFO (UART_FCR_CLEAR_RCVR) also
+ * incorrectly flushes write data as well as just basically trashing the
+ * FIFO.
*
- * I believe this is a BUG in this UART.
- * So for now, we will leave the code #ifdef'ed out...
+ * Presumably, this is a bug in this UART.
*/
udelay(10);