drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODE
authorBibby Hsieh <bibby.hsieh@mediatek.com>
Tue, 18 Oct 2016 08:23:59 +0000 (16:23 +0800)
committerCK Hu <ck.hu@mediatek.com>
Wed, 19 Oct 2016 01:03:20 +0000 (09:03 +0800)
If we want to set the hardware OD to relay mode,
we have to set OD_CFG register rather than
OD_RELAYMODE; otherwise, the system will access
the wrong address.

Fixes: 7216436420414144646f5d8343d061355fd23483 ("drm/mediatek: set mt8173 dithering function")
Cc: stable@vger.kernel.org # v4.9+
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Acked-by: CK Hu <ck.hu@mediatek.com>
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c

index df33b3ca6ffd5b2038e3e01d81ada28ffd33462e..aa5f20fabd10f4f650411ac94d9e7b01a4ddf33a 100644 (file)
@@ -123,7 +123,7 @@ static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w,
                          unsigned int bpc)
 {
        writel(w << 16 | h, comp->regs + DISP_OD_SIZE);
-       writel(OD_RELAYMODE, comp->regs + OD_RELAYMODE);
+       writel(OD_RELAYMODE, comp->regs + OD_CFG);
        mtk_dither_set(comp, bpc, DISP_OD_CFG);
 }