be2net: replace (1 << x) with BIT(x)
authorVasundhara Volam <vasundhara.volam@emulex.com>
Fri, 6 Feb 2015 13:18:36 +0000 (08:18 -0500)
committerDavid S. Miller <davem@davemloft.net>
Sun, 8 Feb 2015 06:50:57 +0000 (22:50 -0800)
BIT(x) is the preffered usage.
Signed-off-by: Vasundhara Volam <vasundhara.volam@emulex.com>
Signed-off-by: Sathya Perla <sathya.perla@emulex.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/emulex/benet/be.h
drivers/net/ethernet/emulex/benet/be_cmds.h
drivers/net/ethernet/emulex/benet/be_hw.h

index 3b1d59d1bd1cdc0dca576ab43ecafb44c23f1fff..9869556f367deb6803e73d338a9b569491c8b9eb 100644 (file)
@@ -361,15 +361,15 @@ enum vf_state {
        ASSIGNED = 1
 };
 
-#define BE_FLAGS_LINK_STATUS_INIT              1
-#define BE_FLAGS_SRIOV_ENABLED                 (1 << 2)
-#define BE_FLAGS_WORKER_SCHEDULED              (1 << 3)
-#define BE_FLAGS_VLAN_PROMISC                  (1 << 4)
-#define BE_FLAGS_MCAST_PROMISC                 (1 << 5)
-#define BE_FLAGS_NAPI_ENABLED                  (1 << 9)
-#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD            (1 << 11)
-#define BE_FLAGS_VXLAN_OFFLOADS                        (1 << 12)
-#define BE_FLAGS_SETUP_DONE                    (1 << 13)
+#define BE_FLAGS_LINK_STATUS_INIT              BIT(1)
+#define BE_FLAGS_SRIOV_ENABLED                 BIT(2)
+#define BE_FLAGS_WORKER_SCHEDULED              BIT(3)
+#define BE_FLAGS_VLAN_PROMISC                  BIT(4)
+#define BE_FLAGS_MCAST_PROMISC                 BIT(5)
+#define BE_FLAGS_NAPI_ENABLED                  BIT(6)
+#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD            BIT(7)
+#define BE_FLAGS_VXLAN_OFFLOADS                        BIT(8)
+#define BE_FLAGS_SETUP_DONE                    BIT(9)
 
 #define BE_UC_PMAC_COUNT                       30
 #define BE_VF_UC_PMAC_COUNT                    2
index c2701ccd0a1d8eff34d9fb3fa243e3ffce7ebb49..c231e45e707032a8ea20998d262294edf0a099ef 100644 (file)
@@ -44,10 +44,10 @@ struct be_mcc_wrb {
        } payload;
 };
 
-#define CQE_FLAGS_VALID_MASK           (1 << 31)
-#define CQE_FLAGS_ASYNC_MASK           (1 << 30)
-#define CQE_FLAGS_COMPLETED_MASK       (1 << 28)
-#define CQE_FLAGS_CONSUMED_MASK        (1 << 27)
+#define CQE_FLAGS_VALID_MASK           BIT(31)
+#define CQE_FLAGS_ASYNC_MASK           BIT(30)
+#define CQE_FLAGS_COMPLETED_MASK       BIT(28)
+#define CQE_FLAGS_CONSUMED_MASK                BIT(27)
 
 /* Completion Status */
 enum mcc_base_status {
index 8e91ae851a7cb3c1c3429c8ee360847cc9c8fad9..a8593aa46359a884dbfdb1f78ec050530ef0b434 100644 (file)
@@ -75,7 +75,7 @@
  * atomically without having to arbitrate for the PCI Interrupt Disable bit
  * with the OS.
  */
-#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK     (1 << 29) /* bit 29 */
+#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK     BIT(29) /* bit 29 */
 
 /********* PCI Function Capability *********/
 #define BE_FUNCTION_CAPS_RSS                   0x2
@@ -224,7 +224,7 @@ struct amap_eth_hdr_wrb {
 } __packed;
 
 #define TX_HDR_WRB_COMPL               1               /* word 2 */
-#define TX_HDR_WRB_EVT                 (1 << 1)        /* word 2 */
+#define TX_HDR_WRB_EVT                 BIT(1)          /* word 2 */
 #define TX_HDR_WRB_NUM_SHIFT           13              /* word 2: bits 13:17 */
 #define TX_HDR_WRB_NUM_MASK            0x1F            /* word 2: bits 13:17 */