drm/i915: DisplayPort-MST pixel clock check
authorMika Kahola <mika.kahola@intel.com>
Tue, 2 Feb 2016 13:16:40 +0000 (15:16 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 11 Feb 2016 09:15:38 +0000 (10:15 +0100)
It is possible the we request to have a mode that has
higher pixel clock than our HW can support. This patch
checks if requested pixel clock is lower than the one
supported by the HW. The requested mode is discarded
if we cannot support the requested pixel clock.

This patch applies to DisplayPort MST.

V2:
- removed computation for max pixel clock

V3:
- cleanup by removing unnecessary lines

V4:
- max_pixclk variable renamed as max_dotclk

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1454419003-6001-4-git-send-email-mika.kahola@intel.com
drivers/gpu/drm/i915/intel_dp_mst.c

index 2a2ab306ad8457f523c06ffdfc543e847d2ebe4a..a2bd698fe2f78f801813c99b097d7576e2f0c869 100644 (file)
@@ -371,6 +371,8 @@ static enum drm_mode_status
 intel_dp_mst_mode_valid(struct drm_connector *connector,
                        struct drm_display_mode *mode)
 {
+       int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
+
        /* TODO - validate mode against available PBN for link */
        if (mode->clock < 10000)
                return MODE_CLOCK_LOW;
@@ -378,6 +380,9 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
        if (mode->flags & DRM_MODE_FLAG_DBLCLK)
                return MODE_H_ILLEGAL;
 
+       if (mode->clock > max_dotclk)
+               return MODE_CLOCK_HIGH;
+
        return MODE_OK;
 }