ARM: dts: imx: ventana: add RS485 txen gpio support
authorTim Harvey <tharvey@gateworks.com>
Tue, 9 Aug 2016 19:18:49 +0000 (12:18 -0700)
committerShawn Guo <shawnguo@kernel.org>
Mon, 15 Aug 2016 12:15:05 +0000 (20:15 +0800)
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi

index 208e3c29116529bf22b1002efc6f766e603fdfd0..a7100f99123e9593dac8941c9dc379a3782e8a18 100644 (file)
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
+       uart-has-rtscts;
+       rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
                        fsl,pins = <
                                MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
                                MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
+                               MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x4001b0b1 /* TEN */
                        >;
                };
 
index 35b9e808a4bb77246f1a6d553bfd8bbd0aa06119..8953eba0573daa8844c52e1671a25046b850aad2 100644 (file)
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
+       uart-has-rtscts;
+       rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
                        fsl,pins = <
                                MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
                                MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
+                               MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x4001b0b1 /* TEN */
                        >;
                };
 
index 5f8f1ea6d2a23cb80c2a562e6495fcb04a03a0f0..6ac41c7ed32e03b84154aa72fc3c22b034e76ffb 100644 (file)
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
+       uart-has-rtscts;
+       rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };
 
                        fsl,pins = <
                                MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
                                MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
+                               MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x4001b0b1 /* TEN */
                        >;
                };