cxgb4: Add the MC1 registers to read in the interrupt handler
authorHariprasad Shenai <hariprasad@chelsio.com>
Mon, 21 Jul 2014 15:25:12 +0000 (20:55 +0530)
committerDavid S. Miller <davem@davemloft.net>
Tue, 22 Jul 2014 03:23:59 +0000 (20:23 -0700)
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

index eb5a278e8045897ea7f962b81143730a7dd0666f..e76885236e9d70adb6eabdc399b90cb67638af3d 100644 (file)
@@ -1719,16 +1719,24 @@ static void mps_intr_handler(struct adapter *adapter)
  */
 static void mem_intr_handler(struct adapter *adapter, int idx)
 {
-       static const char name[3][5] = { "EDC0", "EDC1", "MC" };
+       static const char name[4][7] = { "EDC0", "EDC1", "MC/MC0", "MC1" };
 
        unsigned int addr, cnt_addr, v;
 
        if (idx <= MEM_EDC1) {
                addr = EDC_REG(EDC_INT_CAUSE, idx);
                cnt_addr = EDC_REG(EDC_ECC_STATUS, idx);
+       } else if (idx == MEM_MC) {
+               if (is_t4(adapter->params.chip)) {
+                       addr = MC_INT_CAUSE;
+                       cnt_addr = MC_ECC_STATUS;
+               } else {
+                       addr = MC_P_INT_CAUSE;
+                       cnt_addr = MC_P_ECC_STATUS;
+               }
        } else {
-               addr = MC_INT_CAUSE;
-               cnt_addr = MC_ECC_STATUS;
+               addr = MC_REG(MC_P_INT_CAUSE, 1);
+               cnt_addr = MC_REG(MC_P_ECC_STATUS, 1);
        }
 
        v = t4_read_reg(adapter, addr) & MEM_INT_MASK;
@@ -1892,6 +1900,8 @@ int t4_slow_intr_handler(struct adapter *adapter)
                pcie_intr_handler(adapter);
        if (cause & MC)
                mem_intr_handler(adapter, MEM_MC);
+       if (!is_t4(adapter->params.chip) && (cause & MC1))
+               mem_intr_handler(adapter, MEM_MC1);
        if (cause & EDC0)
                mem_intr_handler(adapter, MEM_EDC0);
        if (cause & EDC1)
index 3b244abbf907f18aef90bef2ce069b1a357de10a..e3146e83df2043ae59436e7eff6b8c276a3fb3e4 100644 (file)
 #define  TDUE 0x00010000U
 
 #define MC_INT_CAUSE 0x7518
+#define MC_P_INT_CAUSE 0x41318
 #define  ECC_UE_INT_CAUSE 0x00000004U
 #define  ECC_CE_INT_CAUSE 0x00000002U
 #define  PERR_INT_CAUSE   0x00000001U
 
 #define MC_ECC_STATUS 0x751c
+#define MC_P_ECC_STATUS 0x4131c
 #define  ECC_CECNT_MASK   0xffff0000U
 #define  ECC_CECNT_SHIFT  16
 #define  ECC_CECNT(x)     ((x) << ECC_CECNT_SHIFT)
 #define  I2CM       0x00000002U
 #define  CIM        0x00000001U
 
+#define MC1 0x31
 #define PL_INT_ENABLE 0x19410
 #define PL_INT_MAP0 0x19414
 #define PL_RST 0x19428