ARM: at91: add Shutdown Controller (SHDWC) DT support

Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 1f878207743316f45d6c08faba5c0100432d86b6..ecc81e3687153689337859f910cecb33627e8f49 100644 (file)
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -61,3 +61,32 @@ Examples:
                reg = <0xffffe400 0x200
                       0xffffe600 0x200>;
        };
+
+SHDWC Shutdown Controller
+
+required properties:
+- compatible: Should be "atmel,<chip>-shdwc".
+  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
+- reg: Should contain registers location and length
+
+optional properties:
+- atmel,wakeup-mode: String, operation mode of the wakeup mode.
+  Supported values are: "none", "high", "low", "any".
+- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
+
+optional at91sam9260 properties:
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9rl properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
+
+optional at91sam9x5 properties:
+- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
+
+Example:
+
+       rstc@fffffd00 {
+               compatible = "atmel,at91sam9260-rstc";
+               reg = <0xfffffd00 0x10>;
+       };

diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 0a1df8d9bfb682dc3e1aa35fa2830bd5027a881d..9a0647bb387f3cbae5cda8f1140f75e6a5ffaaf6 100644 (file)
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -74,6 +74,11 @@
                                reg = <0xfffffd00 0x10>;
                        };
 
+                       shdwc@fffffd10 {
+                               compatible = "atmel,at91sam9260-shdwc";
+                               reg = <0xfffffd10 0x10>;
+                       };
+
                        pit: timer@fffffd30 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xfffffd30 0xf>;

diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 587a1913c062a9d44ac71623918cc5bcc1211997..8908f078c307b6cea38e0bc8afaf77193e11b542 100644 (file)
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -83,6 +83,11 @@
                        };
 
 
+                       shdwc@fffffd10 {
+                               compatible = "atmel,at91sam9rl-shdwc";
+                               reg = <0xfffffd10 0x10>;
+                       };
+
                        tcb0: timer@fff7c000 {
                                compatible = "atmel,at91rm9200-tcb";
                                reg = <0xfff7c000 0x100>;

diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 73c46e3dffab87a8795cd340c20ab967fdc58a8f..20155ccbbe143c7fc8625cffa39acee757600043 100644 (file)
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -73,6 +73,11 @@
                                reg = <0xfffffe00 0x10>;
                        };
 
+                       shdwc@fffffe10 {
+                               compatible = "atmel,at91sam9x5-shdwc";
+                               reg = <0xfffffe10 0x10>;
+                       };
+
                        pit: timer@fffffe30 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xfffffe30 0xf>;

diff --git a/arch/arm/mach-at91/include/mach/at91_shdwc.h b/arch/arm/mach-at91/include/mach/at91_shdwc.h
index 1d4fe822c77a50fb6ac877b546f1846d1a79f3e9..60478ea8bd46a0b11f2f5f8571b7f66dd095db5b 100644 (file)
--- a/arch/arm/mach-at91/include/mach/at91_shdwc.h
+++ b/arch/arm/mach-at91/include/mach/at91_shdwc.h
@@ -36,9 +36,11 @@ extern void __iomem *at91_shdwc_base;
 #define                        AT91_SHDW_WKMODE0_HIGH          1
 #define                        AT91_SHDW_WKMODE0_LOW           2
 #define                        AT91_SHDW_WKMODE0_ANYLEVEL      3
-#define                AT91_SHDW_CPTWK0        (0xf << 4)              /* Counter On Wake Up 0 */
+#define                AT91_SHDW_CPTWK0_MAX    0xf                     /* Maximum Counter On Wake Up 0 */
+#define                AT91_SHDW_CPTWK0        (AT91_SHDW_CPTWK0_MAX << 4) /* Counter On Wake Up 0 */
 #define                        AT91_SHDW_CPTWK0_(x)    ((x) << 4)
 #define                AT91_SHDW_RTTWKEN       (1   << 16)             /* Real Time Timer Wake-up Enable */
+#define                AT91_SHDW_RTCWKEN       (1   << 17)             /* Real Time Clock Wake-up Enable */
 
 #define AT91_SHDW_SR           0x08                    /* Shut Down Status Register */
 #define                AT91_SHDW_WAKEUP0       (1 <<  0)               /* Wake-up 0 Status */

diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 46d0a56ba825808d5d1d8b8a4213fa71d7d74f36..1083739e30650185ccaed48d7f242e1bee4ce506 100644 (file)
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -351,10 +351,87 @@ static void at91_dt_ramc(void)
        of_node_put(np);
 }
 
+static struct of_device_id shdwc_ids[] = {
+       { .compatible = "atmel,at91sam9260-shdwc", },
+       { .compatible = "atmel,at91sam9rl-shdwc", },
+       { .compatible = "atmel,at91sam9x5-shdwc", },
+       { /*sentinel*/ }
+};
+
+static const char *shdwc_wakeup_modes[] = {
+       [AT91_SHDW_WKMODE0_NONE]        = "none",
+       [AT91_SHDW_WKMODE0_HIGH]        = "high",
+       [AT91_SHDW_WKMODE0_LOW]         = "low",
+       [AT91_SHDW_WKMODE0_ANYLEVEL]    = "any",
+};
+
+const int at91_dtget_shdwc_wakeup_mode(struct device_node *np)
+{
+       const char *pm;
+       int err, i;
+
+       err = of_property_read_string(np, "atmel,wakeup-mode", &pm);
+       if (err < 0)
+               return AT91_SHDW_WKMODE0_ANYLEVEL;
+
+       for (i = 0; i < ARRAY_SIZE(shdwc_wakeup_modes); i++)
+               if (!strcasecmp(pm, shdwc_wakeup_modes[i]))
+                       return i;
+
+       return -ENODEV;
+}
+
+static void at91_dt_shdwc(void)
+{
+       struct device_node *np;
+       int wakeup_mode;
+       u32 reg;
+       u32 mode = 0;
+
+       np = of_find_matching_node(NULL, shdwc_ids);
+       if (!np) {
+               pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n");
+               return;
+       }
+
+       at91_shdwc_base = of_iomap(np, 0);
+       if (!at91_shdwc_base)
+               panic("AT91: unable to map shdwc cpu registers\n");
+
+       wakeup_mode = at91_dtget_shdwc_wakeup_mode(np);
+       if (wakeup_mode < 0) {
+               pr_warn("AT91: shdwc unknown wakeup mode\n");
+               goto end;
+       }
+
+       if (!of_property_read_u32(np, "atmel,wakeup-counter", &reg)) {
+               if (reg > AT91_SHDW_CPTWK0_MAX) {
+                       pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n",
+                               reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX);
+                       reg = AT91_SHDW_CPTWK0_MAX;
+               }
+               mode |= AT91_SHDW_CPTWK0_(reg);
+       }
+
+       if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
+                       mode |= AT91_SHDW_RTCWKEN;
+
+       if (of_property_read_bool(np, "atmel,wakeup-rtt-timer"))
+                       mode |= AT91_SHDW_RTTWKEN;
+
+       at91_shdwc_write(AT91_SHDW_MR, wakeup_mode | mode);
+
+end:
+       pm_power_off = at91sam9_poweroff;
+
+       of_node_put(np);
+}
+
 void __init at91_dt_initialize(void)
 {
        at91_dt_rstc();
        at91_dt_ramc();
+       at91_dt_shdwc();
 
        /* Init clock subsystem */
        at91_dt_clock_init();