drm/i915/skl: Implement WaDisableHDCInvalidation
authorDamien Lespiau <damien.lespiau@intel.com>
Mon, 9 Feb 2015 19:33:19 +0000 (19:33 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 13 Feb 2015 22:28:35 +0000 (23:28 +0100)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_pm.c

index 0fb6a4f6c6f75c39278af091998a37801132e2de..75227009d0bbc3109a97adca8a54b59ce70ac430 100644 (file)
 #define GEN8_RING_PDP_LDW(ring, n)     ((ring)->mmio_base+0x270 + (n) * 8)
 
 #define GAM_ECOCHK                     0x4090
+#define   BDW_DISABLE_HDC_INVALIDATION (1<<25)
 #define   ECOCHK_SNB_BIT               (1<<10)
 #define   HSW_ECOCHK_ARB_PRIO_SOL      (1<<6)
 #define   ECOCHK_PPGTT_CACHE64B                (0x3<<3)
index d7750176091b1951fb4f64cce9600ea978f24377..a2b9c3e213f935a9693471a1c51674438661d468 100644 (file)
@@ -66,6 +66,12 @@ static void skl_init_clock_gating(struct drm_device *dev)
                           GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
        }
 
+       if (INTEL_REVID(dev) <= SKL_REVID_D0)
+               /* WaDisableHDCInvalidation:skl */
+               I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
+                          BDW_DISABLE_HDC_INVALIDATION);
+
+
        if (INTEL_REVID(dev) <= SKL_REVID_E0)
                /* WaDisableLSQCROPERFforOCL:skl */
                I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) |