ath9k: Add a #define for the EEPROM "eepmisc" endianness bit
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Mon, 5 Dec 2016 11:27:32 +0000 (13:27 +0200)
committerKalle Valo <kvalo@qca.qualcomm.com>
Thu, 15 Dec 2016 08:26:11 +0000 (10:26 +0200)
This replaces a magic number with a named #define. Additionally it
removes two "eeprom format" specific #defines for the "big endianness"
bit which are the same on all eeprom formats.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
drivers/net/wireless/ath/ath9k/eeprom.h
drivers/net/wireless/ath/ath9k/eeprom_4k.c
drivers/net/wireless/ath/ath9k/eeprom_9287.c
drivers/net/wireless/ath/ath9k/eeprom_def.c

index 08607d7fdb56adc865b4fc70564abca86a49488d..ea7b8190b3bdbbfe7be93fbe575412f09102db8d 100644 (file)
@@ -3468,7 +3468,8 @@ static u32 ath9k_hw_ar9003_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
                                        AR5416_OPFLAGS_N_5G_HT20));
        PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags &
                                        AR5416_OPFLAGS_N_5G_HT40));
-       PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & 0x01));
+       PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc &
+                               AR5416_EEPMISC_BIG_ENDIAN));
        PR_EEP("RF Silent", pBase->rfSilent);
        PR_EEP("BT option", pBase->blueToothOptions);
        PR_EEP("Device Cap", pBase->deviceCap);
index 107bcfbbe0fb31f494cb4e5a83f1dca9e290db62..0a4c7360e84767625436740697354cab67864728 100644 (file)
@@ -38,7 +38,6 @@
 #define AR9300_NUM_CTLS_2G           12
 #define AR9300_NUM_BAND_EDGES_5G     8
 #define AR9300_NUM_BAND_EDGES_2G     4
-#define AR9300_EEPMISC_BIG_ENDIAN    0x01
 #define AR9300_EEPMISC_WOW           0x02
 #define AR9300_CUSTOMER_DATA_SIZE    20
 
index 4465c6566f2053d78f095ce01b7c70c984d8c768..c466adaad00c417d07c361a54c4f7aee8ea16099 100644 (file)
 #define AR5416_EEP_TXGAIN_ORIGINAL         0
 #define AR5416_EEP_TXGAIN_HIGH_POWER       1
 
+/* Endianness of EEPROM content */
+#define AR5416_EEPMISC_BIG_ENDIAN          0x01
+
 #define AR5416_EEP4K_START_LOC                64
 #define AR5416_EEP4K_NUM_2G_CAL_PIERS         3
 #define AR5416_EEP4K_NUM_2G_CCK_TARGET_POWERS 3
 #define AR9287_NUM_CTLS                12
 #define AR9287_NUM_BAND_EDGES          4
 #define AR9287_PD_GAIN_ICEPTS           1
-#define AR9287_EEPMISC_BIG_ENDIAN       0x01
 #define AR9287_EEPMISC_WOW              0x02
 #define AR9287_MAX_CHAINS               2
 #define AR9287_ANT_16S                  32
index 5da0826bf1be031472cb8c9a19743c7d2fe21154..780cb49db66c19f93518648eb45d8cd1c1f02731 100644 (file)
@@ -154,7 +154,7 @@ static u32 ath9k_hw_4k_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
                                        AR5416_OPFLAGS_N_5G_HT20));
        PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
                                        AR5416_OPFLAGS_N_5G_HT40));
-       PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));
+       PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
        PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
        PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
        PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
index 1a019a39eda1048fdf07e969338de768616a97b9..f483ba2d004b13093a6d4ba5ee334ac41c092c2f 100644 (file)
@@ -150,7 +150,7 @@ static u32 ath9k_hw_ar9287_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
                                        AR5416_OPFLAGS_N_5G_HT20));
        PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
                                        AR5416_OPFLAGS_N_5G_HT40));
-       PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));
+       PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
        PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
        PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
        PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);
index 959682f7909c0b52324ec9cde6063883a11b02af..39b1b27585c1d13d35da4e27ba21f6ae936727e5 100644 (file)
@@ -232,7 +232,7 @@ static u32 ath9k_hw_def_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
                                        AR5416_OPFLAGS_N_5G_HT20));
        PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags &
                                        AR5416_OPFLAGS_N_5G_HT40));
-       PR_EEP("Big Endian", !!(pBase->eepMisc & 0x01));
+       PR_EEP("Big Endian", !!(pBase->eepMisc & AR5416_EEPMISC_BIG_ENDIAN));
        PR_EEP("Cal Bin Major Ver", (pBase->binBuildNumber >> 24) & 0xFF);
        PR_EEP("Cal Bin Minor Ver", (pBase->binBuildNumber >> 16) & 0xFF);
        PR_EEP("Cal Bin Build", (pBase->binBuildNumber >> 8) & 0xFF);