Issuing a cache flush for the whole bitstream buffer is not optimal in the first
place when only a part of it was written. But given that the buffer is mapped in
writecombine mode, it is not needed at all.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Ian Molton <imolton@ad-holdings.co.uk>
Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
if (n < src_size)
return -ENOSPC;
- dma_sync_single_for_device(&ctx->dev->plat_dev->dev,
- ctx->bitstream.paddr, ctx->bitstream.size,
- DMA_TO_DEVICE);
-
src_buf->v4l2_buf.sequence = ctx->qsequence++;
return 0;