config SH_PCLK_FREQ
int "Peripheral clock frequency (in Hz)"
- default "27000000" if CPU_SUBTYPE_SH7343
+ depends on SH_CLK_CPG_LEGACY
default "31250000" if CPU_SUBTYPE_SH7619
- default "32000000" if CPU_SUBTYPE_SH7722
- default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
- CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
- CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
- CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG || \
- CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724
+ default "33333333" if CPU_SUBTYPE_SH7770 || \
+ CPU_SUBTYPE_SH7760 || \
+ CPU_SUBTYPE_SH7705 || \
+ CPU_SUBTYPE_SH7203 || \
+ CPU_SUBTYPE_SH7206 || \
+ CPU_SUBTYPE_SH7263 || \
+ CPU_SUBTYPE_MXG || \
+ CPU_SUBTYPE_SH7786
default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
default "66000000" if CPU_SUBTYPE_SH4_202
default "50000000"
#ifndef __ASM_SH_TIMEX_H
#define __ASM_SH_TIMEX_H
+/*
+ * Only parts using the legacy CPG code for their clock framework
+ * implementation need to define their own Pclk value. If provided, this
+ * can be used for accurately setting CLOCK_TICK_RATE, otherwise we
+ * simply fall back on the i8253 PIT value.
+ */
+#ifdef CONFIG_SH_PCLK_FREQ
#define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */
+#else
+#define CLOCK_TICK_RATE 1193180
+#endif
#include <asm-generic/timex.h>