Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 22 May 2012 16:39:42 +0000 (09:39 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 22 May 2012 16:39:42 +0000 (09:39 -0700)
Pull arm soc-specific pinctrl changes from Olof Johansson:
 "With this, five platforms are moving to the relatively new pinctrl
  subsystem for their pin management, replacing the older soc specific
  in-kernel interfaces with common code.

  There is quite a bit of net addition of code for each platform being
  added to the pinctrl subsystem.  But the payback comes later when
  adding new boards can be done by only providing new device trees
  instead."

Fix up trivial conflicts in arch/arm/mach-ux500/{Makefile,board-mop500.c}

* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
  mtd: nand: gpmi: fix compile error caused by pinctrl call
  ARM: PRIMA2: select PINCTRL and PINCTRL_SIRF in Kconfig
  ARM: nomadik: enable PINCTRL_NOMADIK where needed
  ARM: mxs: enable pinctrl support
  video: mxsfb: adopt pinctrl support
  ASoC: mxs-saif: adopt pinctrl support
  i2c: mxs: adopt pinctrl support
  mtd: nand: gpmi: adopt pinctrl support
  mmc: mxs-mmc: adopt pinctrl support
  serial: mxs-auart: adopt pinctrl support
  serial: amba-pl011: adopt pinctrl support
  spi/imx: adopt pinctrl support
  i2c: imx: adopt pinctrl support
  can: flexcan: adopt pinctrl support
  net: fec: adopt pinctrl support
  ARM: ux500: switch MSP to using pinctrl for pins
  ARM: ux500: alter MSP registration to return a device pointer
  ARM: ux500: switch to using pinctrl for uart0
  ARM: ux500: delete custom pin control system
  ARM: ux500: switch over to Nomadik pinctrl driver
  ...

24 files changed:
1  2 
MAINTAINERS
arch/arm/Kconfig
arch/arm/boot/dts/spear300-evb.dts
arch/arm/mach-imx/Kconfig
arch/arm/mach-spear3xx/include/mach/generic.h
arch/arm/mach-spear3xx/spear300.c
arch/arm/mach-spear3xx/spear310.c
arch/arm/mach-spear3xx/spear320.c
arch/arm/mach-spear3xx/spear3xx.c
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-ux500/Kconfig
arch/arm/mach-ux500/Makefile
arch/arm/mach-ux500/board-mop500.c
arch/arm/mach-ux500/clock.c
arch/arm/mach-ux500/cpu-db8500.c
arch/arm/mach-ux500/cpu.c
arch/arm/mach-ux500/devices-common.h
arch/arm/mach-ux500/devices-db8500.h
drivers/gpio/Makefile
drivers/i2c/busses/i2c-mxs.c
drivers/net/ethernet/freescale/fec.c
drivers/pinctrl/Kconfig
drivers/pinctrl/Makefile
drivers/usb/host/ehci-tegra.c

diff --cc MAINTAINERS
Simple merge
Simple merge
Simple merge
Simple merge
index e4f4d721cda2c909e075448a33e052374cb08015,9603bf4d5119d391e12e11c3d56d40a086ce8934..bdb304551cafe3a90679bb3a9e8ca5e6ce54c713
  #include <linux/amba/bus.h>
  #include <asm/mach/time.h>
  #include <asm/mach/map.h>
- #include <plat/padmux.h>
  
 -/* spear3xx declarations */
 -/*
 - * Each GPT has 2 timer channels
 - * Following GPT channels will be used as clock source and clockevent
 - */
 -#define SPEAR_GPT0_BASE               SPEAR3XX_ML1_TMR_BASE
 -#define SPEAR_GPT0_CHAN0_IRQ  SPEAR3XX_IRQ_CPU_GPT1_1
 -#define SPEAR_GPT0_CHAN1_IRQ  SPEAR3XX_IRQ_CPU_GPT1_2
 -
  /* Add spear3xx family device structure declarations here */
  extern struct sys_timer spear3xx_timer;
  extern struct pl022_ssp_controller pl022_plat_data;
index febcdd8d4e9280ae52e146494246a9c728a69053,2db0bd14e48181dbb9f84600f5733501650496fc..f75fe25a620ce5256222bb873b9701f41406eb50
  #include <asm/mach/arch.h>
  #include <plat/shirq.h>
  #include <mach/generic.h>
 -#include <mach/hardware.h>
 +#include <mach/spear.h>
 +
 +/* Base address of various IPs */
 +#define SPEAR300_TELECOM_BASE         UL(0x50000000)
 +
 +/* Interrupt registers offsets and masks */
 +#define SPEAR300_INT_ENB_MASK_REG     0x54
 +#define SPEAR300_INT_STS_MASK_REG     0x58
 +#define SPEAR300_IT_PERS_S_IRQ_MASK   (1 << 0)
 +#define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1)
 +#define SPEAR300_I2S_IRQ_MASK         (1 << 2)
 +#define SPEAR300_TDM_IRQ_MASK         (1 << 3)
 +#define SPEAR300_CAMERA_L_IRQ_MASK    (1 << 4)
 +#define SPEAR300_CAMERA_F_IRQ_MASK    (1 << 5)
 +#define SPEAR300_CAMERA_V_IRQ_MASK    (1 << 6)
 +#define SPEAR300_KEYBOARD_IRQ_MASK    (1 << 7)
 +#define SPEAR300_GPIO1_IRQ_MASK               (1 << 8)
 +
 +#define SPEAR300_SHIRQ_RAS1_MASK      0x1FF
 +
 +#define SPEAR300_SOC_CONFIG_BASE      UL(0x99000000)
 +
 +
 +/* SPEAr300 Virtual irq definitions */
 +/* IRQs sharing IRQ_GEN_RAS_1 */
 +#define SPEAR300_VIRQ_IT_PERS_S                       (SPEAR3XX_VIRQ_START + 0)
 +#define SPEAR300_VIRQ_IT_CHANGE_S             (SPEAR3XX_VIRQ_START + 1)
 +#define SPEAR300_VIRQ_I2S                     (SPEAR3XX_VIRQ_START + 2)
 +#define SPEAR300_VIRQ_TDM                     (SPEAR3XX_VIRQ_START + 3)
 +#define SPEAR300_VIRQ_CAMERA_L                        (SPEAR3XX_VIRQ_START + 4)
 +#define SPEAR300_VIRQ_CAMERA_F                        (SPEAR3XX_VIRQ_START + 5)
 +#define SPEAR300_VIRQ_CAMERA_V                        (SPEAR3XX_VIRQ_START + 6)
 +#define SPEAR300_VIRQ_KEYBOARD                        (SPEAR3XX_VIRQ_START + 7)
 +#define SPEAR300_VIRQ_GPIO1                   (SPEAR3XX_VIRQ_START + 8)
 +
 +/* IRQs sharing IRQ_GEN_RAS_3 */
 +#define SPEAR300_IRQ_CLCD                     SPEAR3XX_IRQ_GEN_RAS_3
 +
 +/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
 +#define SPEAR300_IRQ_SDHCI                    SPEAR3XX_IRQ_INTRCOMM_RAS_ARM
  
- /* pad multiplexing support */
- /* muxing registers */
- #define PAD_MUX_CONFIG_REG    0x00
- #define MODE_CONFIG_REG               0x04
- /* modes */
- #define NAND_MODE                     (1 << 0)
- #define NOR_MODE                      (1 << 1)
- #define PHOTO_FRAME_MODE              (1 << 2)
- #define LEND_IP_PHONE_MODE            (1 << 3)
- #define HEND_IP_PHONE_MODE            (1 << 4)
- #define LEND_WIFI_PHONE_MODE          (1 << 5)
- #define HEND_WIFI_PHONE_MODE          (1 << 6)
- #define ATA_PABX_WI2S_MODE            (1 << 7)
- #define ATA_PABX_I2S_MODE             (1 << 8)
- #define CAML_LCDW_MODE                        (1 << 9)
- #define CAMU_LCD_MODE                 (1 << 10)
- #define CAMU_WLCD_MODE                        (1 << 11)
- #define CAML_LCD_MODE                 (1 << 12)
- #define ALL_MODES                     0x1FFF
- struct pmx_mode spear300_nand_mode = {
-       .id = NAND_MODE,
-       .name = "nand mode",
-       .mask = 0x00,
- };
- struct pmx_mode spear300_nor_mode = {
-       .id = NOR_MODE,
-       .name = "nor mode",
-       .mask = 0x01,
- };
- struct pmx_mode spear300_photo_frame_mode = {
-       .id = PHOTO_FRAME_MODE,
-       .name = "photo frame mode",
-       .mask = 0x02,
- };
- struct pmx_mode spear300_lend_ip_phone_mode = {
-       .id = LEND_IP_PHONE_MODE,
-       .name = "lend ip phone mode",
-       .mask = 0x03,
- };
- struct pmx_mode spear300_hend_ip_phone_mode = {
-       .id = HEND_IP_PHONE_MODE,
-       .name = "hend ip phone mode",
-       .mask = 0x04,
- };
- struct pmx_mode spear300_lend_wifi_phone_mode = {
-       .id = LEND_WIFI_PHONE_MODE,
-       .name = "lend wifi phone mode",
-       .mask = 0x05,
- };
- struct pmx_mode spear300_hend_wifi_phone_mode = {
-       .id = HEND_WIFI_PHONE_MODE,
-       .name = "hend wifi phone mode",
-       .mask = 0x06,
- };
- struct pmx_mode spear300_ata_pabx_wi2s_mode = {
-       .id = ATA_PABX_WI2S_MODE,
-       .name = "ata pabx wi2s mode",
-       .mask = 0x07,
- };
- struct pmx_mode spear300_ata_pabx_i2s_mode = {
-       .id = ATA_PABX_I2S_MODE,
-       .name = "ata pabx i2s mode",
-       .mask = 0x08,
- };
- struct pmx_mode spear300_caml_lcdw_mode = {
-       .id = CAML_LCDW_MODE,
-       .name = "caml lcdw mode",
-       .mask = 0x0C,
- };
- struct pmx_mode spear300_camu_lcd_mode = {
-       .id = CAMU_LCD_MODE,
-       .name = "camu lcd mode",
-       .mask = 0x0D,
- };
- struct pmx_mode spear300_camu_wlcd_mode = {
-       .id = CAMU_WLCD_MODE,
-       .name = "camu wlcd mode",
-       .mask = 0x0E,
- };
- struct pmx_mode spear300_caml_lcd_mode = {
-       .id = CAML_LCD_MODE,
-       .name = "caml lcd mode",
-       .mask = 0x0F,
- };
- /* devices */
- static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
-       {
-               .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
-                       ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
-               .mask = PMX_FIRDA_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_fsmc_2_chips = {
-       .name = "fsmc_2_chips",
-       .modes = pmx_fsmc_2_chips_modes,
-       .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
-       {
-               .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
-                       ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
-               .mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_fsmc_4_chips = {
-       .name = "fsmc_4_chips",
-       .modes = pmx_fsmc_4_chips_modes,
-       .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_keyboard_modes[] = {
-       {
-               .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
-                       LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
-                       CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
-                       CAML_LCD_MODE,
-               .mask = 0x0,
-       },
- };
- struct pmx_dev spear300_pmx_keyboard = {
-       .name = "keyboard",
-       .modes = pmx_keyboard_modes,
-       .mode_count = ARRAY_SIZE(pmx_keyboard_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_clcd_modes[] = {
-       {
-               .ids = PHOTO_FRAME_MODE,
-               .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
-       }, {
-               .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
-                       CAMU_LCD_MODE | CAML_LCD_MODE,
-               .mask = PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_clcd = {
-       .name = "clcd",
-       .modes = pmx_clcd_modes,
-       .mode_count = ARRAY_SIZE(pmx_clcd_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
-       {
-               .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
-               .mask = PMX_MII_MASK,
-       }, {
-               .ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
-               .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
-       }, {
-               .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
-               .mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
-       }, {
-               .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
-               .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
-       }, {
-               .ids = ATA_PABX_WI2S_MODE,
-               .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
-                       | PMX_UART0_MODEM_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_gpio = {
-       .name = "telecom_gpio",
-       .modes = pmx_telecom_gpio_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
-       {
-               .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
-                       HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
-                       | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
-                       | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
-                       | CAMU_WLCD_MODE | CAML_LCD_MODE,
-               .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_tdm = {
-       .name = "telecom_tdm",
-       .modes = pmx_telecom_tdm_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
-       {
-               .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
-                       LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
-                       | ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
-                       CAML_LCDW_MODE | CAML_LCD_MODE,
-               .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = {
-       .name = "telecom_spi_cs_i2c_clk",
-       .modes = pmx_telecom_spi_cs_i2c_clk_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_camera_modes[] = {
-       {
-               .ids = CAML_LCDW_MODE | CAML_LCD_MODE,
-               .mask = PMX_MII_MASK,
-       }, {
-               .ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
-               .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_camera = {
-       .name = "telecom_camera",
-       .modes = pmx_telecom_camera_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_dac_modes[] = {
-       {
-               .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
-                       | CAMU_WLCD_MODE | CAML_LCD_MODE,
-               .mask = PMX_TIMER_1_2_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_dac = {
-       .name = "telecom_dac",
-       .modes = pmx_telecom_dac_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
-       {
-               .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
-                       | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
-                       ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
-                       | CAMU_WLCD_MODE | CAML_LCD_MODE,
-               .mask = PMX_UART0_MODEM_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_i2s = {
-       .name = "telecom_i2s",
-       .modes = pmx_telecom_i2s_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
-       {
-               .ids = NAND_MODE | NOR_MODE,
-               .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
-                       PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_boot_pins = {
-       .name = "telecom_boot_pins",
-       .modes = pmx_telecom_boot_pins_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
-       {
-               .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
-                       HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
-                       HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
-                       CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
-                       ATA_PABX_I2S_MODE,
-               .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
-                       PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
-                       PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_sdhci_4bit = {
-       .name = "telecom_sdhci_4bit",
-       .modes = pmx_telecom_sdhci_4bit_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
-       {
-               .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
-                       HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
-                       HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
-                       CAMU_WLCD_MODE | CAML_LCD_MODE,
-               .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
-                       PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
-                       PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_telecom_sdhci_8bit = {
-       .name = "telecom_sdhci_8bit",
-       .modes = pmx_telecom_sdhci_8bit_modes,
-       .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_gpio1_modes[] = {
-       {
-               .ids = PHOTO_FRAME_MODE,
-               .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
-                       PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear300_pmx_gpio1 = {
-       .name = "arm gpio1",
-       .modes = pmx_gpio1_modes,
-       .mode_count = ARRAY_SIZE(pmx_gpio1_modes),
-       .enb_on_reset = 1,
- };
- /* pmx driver structure */
- static struct pmx_driver pmx_driver = {
-       .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
-       .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
- };
  /* spear3xx shared irq */
  static struct shirq_dev_config shirq_ras1_config[] = {
        {
index b26e41566b50113b1e8b72b4888e9751531ad5f2,aec07c951205323967cca53c0321f02e4c0ccc2a..f0842a58dc024c585dda40ec4aab283d61983046
  #include <asm/mach/arch.h>
  #include <plat/shirq.h>
  #include <mach/generic.h>
 -#include <mach/hardware.h>
 +#include <mach/spear.h>
 +
 +#define SPEAR310_UART1_BASE           UL(0xB2000000)
 +#define SPEAR310_UART2_BASE           UL(0xB2080000)
 +#define SPEAR310_UART3_BASE           UL(0xB2100000)
 +#define SPEAR310_UART4_BASE           UL(0xB2180000)
 +#define SPEAR310_UART5_BASE           UL(0xB2200000)
 +#define SPEAR310_SOC_CONFIG_BASE      UL(0xB4000000)
 +
 +/* Interrupt registers offsets and masks */
 +#define SPEAR310_INT_STS_MASK_REG     0x04
 +#define SPEAR310_SMII0_IRQ_MASK               (1 << 0)
 +#define SPEAR310_SMII1_IRQ_MASK               (1 << 1)
 +#define SPEAR310_SMII2_IRQ_MASK               (1 << 2)
 +#define SPEAR310_SMII3_IRQ_MASK               (1 << 3)
 +#define SPEAR310_WAKEUP_SMII0_IRQ_MASK        (1 << 4)
 +#define SPEAR310_WAKEUP_SMII1_IRQ_MASK        (1 << 5)
 +#define SPEAR310_WAKEUP_SMII2_IRQ_MASK        (1 << 6)
 +#define SPEAR310_WAKEUP_SMII3_IRQ_MASK        (1 << 7)
 +#define SPEAR310_UART1_IRQ_MASK               (1 << 8)
 +#define SPEAR310_UART2_IRQ_MASK               (1 << 9)
 +#define SPEAR310_UART3_IRQ_MASK               (1 << 10)
 +#define SPEAR310_UART4_IRQ_MASK               (1 << 11)
 +#define SPEAR310_UART5_IRQ_MASK               (1 << 12)
 +#define SPEAR310_EMI_IRQ_MASK         (1 << 13)
 +#define SPEAR310_TDM_HDLC_IRQ_MASK    (1 << 14)
 +#define SPEAR310_RS485_0_IRQ_MASK     (1 << 15)
 +#define SPEAR310_RS485_1_IRQ_MASK     (1 << 16)
 +
 +#define SPEAR310_SHIRQ_RAS1_MASK      0x000FF
 +#define SPEAR310_SHIRQ_RAS2_MASK      0x01F00
 +#define SPEAR310_SHIRQ_RAS3_MASK      0x02000
 +#define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK      0x1C000
 +
 +/* SPEAr310 Virtual irq definitions */
 +/* IRQs sharing IRQ_GEN_RAS_1 */
 +#define SPEAR310_VIRQ_SMII0                   (SPEAR3XX_VIRQ_START + 0)
 +#define SPEAR310_VIRQ_SMII1                   (SPEAR3XX_VIRQ_START + 1)
 +#define SPEAR310_VIRQ_SMII2                   (SPEAR3XX_VIRQ_START + 2)
 +#define SPEAR310_VIRQ_SMII3                   (SPEAR3XX_VIRQ_START + 3)
 +#define SPEAR310_VIRQ_WAKEUP_SMII0            (SPEAR3XX_VIRQ_START + 4)
 +#define SPEAR310_VIRQ_WAKEUP_SMII1            (SPEAR3XX_VIRQ_START + 5)
 +#define SPEAR310_VIRQ_WAKEUP_SMII2            (SPEAR3XX_VIRQ_START + 6)
 +#define SPEAR310_VIRQ_WAKEUP_SMII3            (SPEAR3XX_VIRQ_START + 7)
 +
 +/* IRQs sharing IRQ_GEN_RAS_2 */
 +#define SPEAR310_VIRQ_UART1                   (SPEAR3XX_VIRQ_START + 8)
 +#define SPEAR310_VIRQ_UART2                   (SPEAR3XX_VIRQ_START + 9)
 +#define SPEAR310_VIRQ_UART3                   (SPEAR3XX_VIRQ_START + 10)
 +#define SPEAR310_VIRQ_UART4                   (SPEAR3XX_VIRQ_START + 11)
 +#define SPEAR310_VIRQ_UART5                   (SPEAR3XX_VIRQ_START + 12)
 +
 +/* IRQs sharing IRQ_GEN_RAS_3 */
 +#define SPEAR310_VIRQ_EMI                     (SPEAR3XX_VIRQ_START + 13)
 +#define SPEAR310_VIRQ_PLGPIO                  (SPEAR3XX_VIRQ_START + 14)
 +
 +/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
 +#define SPEAR310_VIRQ_TDM_HDLC                        (SPEAR3XX_VIRQ_START + 15)
 +#define SPEAR310_VIRQ_RS485_0                 (SPEAR3XX_VIRQ_START + 16)
 +#define SPEAR310_VIRQ_RS485_1                 (SPEAR3XX_VIRQ_START + 17)
 +
  
- /* pad multiplexing support */
- /* muxing registers */
- #define PAD_MUX_CONFIG_REG    0x08
- /* devices */
- static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = {
-       .name = "emi_cs_0_1_4_5",
-       .modes = pmx_emi_cs_0_1_4_5_modes,
-       .mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_TIMER_1_2_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_emi_cs_2_3 = {
-       .name = "emi_cs_2_3",
-       .modes = pmx_emi_cs_2_3_modes,
-       .mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_uart1_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_FIRDA_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_uart1 = {
-       .name = "uart1",
-       .modes = pmx_uart1_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_uart2_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_TIMER_1_2_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_uart2 = {
-       .name = "uart2",
-       .modes = pmx_uart2_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart2_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_uart3_4_5_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_UART0_MODEM_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_uart3_4_5 = {
-       .name = "uart3_4_5",
-       .modes = pmx_uart3_4_5_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_fsmc_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_SSP_CS_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_fsmc = {
-       .name = "fsmc",
-       .modes = pmx_fsmc_modes,
-       .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_rs485_0_1_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_rs485_0_1 = {
-       .name = "rs485_0_1",
-       .modes = pmx_rs485_0_1_modes,
-       .mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_tdm0_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear310_pmx_tdm0 = {
-       .name = "tdm0",
-       .modes = pmx_tdm0_modes,
-       .mode_count = ARRAY_SIZE(pmx_tdm0_modes),
-       .enb_on_reset = 1,
- };
- /* pmx driver structure */
- static struct pmx_driver pmx_driver = {
-       .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
- };
  /* spear3xx shared irq */
  static struct shirq_dev_config shirq_ras1_config[] = {
        {
index 2f5979b0c1695dc1bfbcb96645def114d03a8d68,4812c692ca351640456e8bb2a352f93de1498334..e8caeef50a5ccec4018dbe5d68930855b5f7cf13
  #include <asm/mach/arch.h>
  #include <plat/shirq.h>
  #include <mach/generic.h>
 -#include <mach/hardware.h>
 +#include <mach/spear.h>
 +
 +#define SPEAR320_UART1_BASE           UL(0xA3000000)
 +#define SPEAR320_UART2_BASE           UL(0xA4000000)
 +#define SPEAR320_SSP0_BASE            UL(0xA5000000)
 +#define SPEAR320_SSP1_BASE            UL(0xA6000000)
 +#define SPEAR320_SOC_CONFIG_BASE      UL(0xB3000000)
 +
 +/* Interrupt registers offsets and masks */
 +#define SPEAR320_INT_STS_MASK_REG             0x04
 +#define SPEAR320_INT_CLR_MASK_REG             0x04
 +#define SPEAR320_INT_ENB_MASK_REG             0x08
 +#define SPEAR320_GPIO_IRQ_MASK                        (1 << 0)
 +#define SPEAR320_I2S_PLAY_IRQ_MASK            (1 << 1)
 +#define SPEAR320_I2S_REC_IRQ_MASK             (1 << 2)
 +#define SPEAR320_EMI_IRQ_MASK                 (1 << 7)
 +#define SPEAR320_CLCD_IRQ_MASK                        (1 << 8)
 +#define SPEAR320_SPP_IRQ_MASK                 (1 << 9)
 +#define SPEAR320_SDHCI_IRQ_MASK                       (1 << 10)
 +#define SPEAR320_CAN_U_IRQ_MASK                       (1 << 11)
 +#define SPEAR320_CAN_L_IRQ_MASK                       (1 << 12)
 +#define SPEAR320_UART1_IRQ_MASK                       (1 << 13)
 +#define SPEAR320_UART2_IRQ_MASK                       (1 << 14)
 +#define SPEAR320_SSP1_IRQ_MASK                        (1 << 15)
 +#define SPEAR320_SSP2_IRQ_MASK                        (1 << 16)
 +#define SPEAR320_SMII0_IRQ_MASK                       (1 << 17)
 +#define SPEAR320_MII1_SMII1_IRQ_MASK          (1 << 18)
 +#define SPEAR320_WAKEUP_SMII0_IRQ_MASK                (1 << 19)
 +#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK   (1 << 20)
 +#define SPEAR320_I2C1_IRQ_MASK                        (1 << 21)
 +
 +#define SPEAR320_SHIRQ_RAS1_MASK              0x000380
 +#define SPEAR320_SHIRQ_RAS3_MASK              0x000007
 +#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK      0x3FF800
 +
 +/* SPEAr320 Virtual irq definitions */
 +/* IRQs sharing IRQ_GEN_RAS_1 */
 +#define SPEAR320_VIRQ_EMI                     (SPEAR3XX_VIRQ_START + 0)
 +#define SPEAR320_VIRQ_CLCD                    (SPEAR3XX_VIRQ_START + 1)
 +#define SPEAR320_VIRQ_SPP                     (SPEAR3XX_VIRQ_START + 2)
 +
 +/* IRQs sharing IRQ_GEN_RAS_2 */
 +#define SPEAR320_IRQ_SDHCI                    SPEAR3XX_IRQ_GEN_RAS_2
 +
 +/* IRQs sharing IRQ_GEN_RAS_3 */
 +#define SPEAR320_VIRQ_PLGPIO                  (SPEAR3XX_VIRQ_START + 3)
 +#define SPEAR320_VIRQ_I2S_PLAY                        (SPEAR3XX_VIRQ_START + 4)
 +#define SPEAR320_VIRQ_I2S_REC                 (SPEAR3XX_VIRQ_START + 5)
 +
 +/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */
 +#define SPEAR320_VIRQ_CANU                    (SPEAR3XX_VIRQ_START + 6)
 +#define SPEAR320_VIRQ_CANL                    (SPEAR3XX_VIRQ_START + 7)
 +#define SPEAR320_VIRQ_UART1                   (SPEAR3XX_VIRQ_START + 8)
 +#define SPEAR320_VIRQ_UART2                   (SPEAR3XX_VIRQ_START + 9)
 +#define SPEAR320_VIRQ_SSP1                    (SPEAR3XX_VIRQ_START + 10)
 +#define SPEAR320_VIRQ_SSP2                    (SPEAR3XX_VIRQ_START + 11)
 +#define SPEAR320_VIRQ_SMII0                   (SPEAR3XX_VIRQ_START + 12)
 +#define SPEAR320_VIRQ_MII1_SMII1              (SPEAR3XX_VIRQ_START + 13)
 +#define SPEAR320_VIRQ_WAKEUP_SMII0            (SPEAR3XX_VIRQ_START + 14)
 +#define SPEAR320_VIRQ_WAKEUP_MII1_SMII1               (SPEAR3XX_VIRQ_START + 15)
 +#define SPEAR320_VIRQ_I2C1                    (SPEAR3XX_VIRQ_START + 16)
  
- /* pad multiplexing support */
- /* muxing registers */
- #define PAD_MUX_CONFIG_REG    0x0C
- #define MODE_CONFIG_REG               0x10
- /* modes */
- #define AUTO_NET_SMII_MODE    (1 << 0)
- #define AUTO_NET_MII_MODE     (1 << 1)
- #define AUTO_EXP_MODE         (1 << 2)
- #define SMALL_PRINTERS_MODE   (1 << 3)
- #define ALL_MODES             0xF
- struct pmx_mode spear320_auto_net_smii_mode = {
-       .id = AUTO_NET_SMII_MODE,
-       .name = "Automation Networking SMII Mode",
-       .mask = 0x00,
- };
- struct pmx_mode spear320_auto_net_mii_mode = {
-       .id = AUTO_NET_MII_MODE,
-       .name = "Automation Networking MII Mode",
-       .mask = 0x01,
- };
- struct pmx_mode spear320_auto_exp_mode = {
-       .id = AUTO_EXP_MODE,
-       .name = "Automation Expanded Mode",
-       .mask = 0x02,
- };
- struct pmx_mode spear320_small_printers_mode = {
-       .id = SMALL_PRINTERS_MODE,
-       .name = "Small Printers Mode",
-       .mask = 0x03,
- };
- /* devices */
- static struct pmx_dev_mode pmx_clcd_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE,
-               .mask = 0x0,
-       },
- };
- struct pmx_dev spear320_pmx_clcd = {
-       .name = "clcd",
-       .modes = pmx_clcd_modes,
-       .mode_count = ARRAY_SIZE(pmx_clcd_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_emi_modes[] = {
-       {
-               .ids = AUTO_EXP_MODE,
-               .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_emi = {
-       .name = "emi",
-       .modes = pmx_emi_modes,
-       .mode_count = ARRAY_SIZE(pmx_emi_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_fsmc_modes[] = {
-       {
-               .ids = ALL_MODES,
-               .mask = 0x0,
-       },
- };
- struct pmx_dev spear320_pmx_fsmc = {
-       .name = "fsmc",
-       .modes = pmx_fsmc_modes,
-       .mode_count = ARRAY_SIZE(pmx_fsmc_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_spp_modes[] = {
-       {
-               .ids = SMALL_PRINTERS_MODE,
-               .mask = 0x0,
-       },
- };
- struct pmx_dev spear320_pmx_spp = {
-       .name = "spp",
-       .modes = pmx_spp_modes,
-       .mode_count = ARRAY_SIZE(pmx_spp_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_sdhci_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE |
-                       SMALL_PRINTERS_MODE,
-               .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_sdhci = {
-       .name = "sdhci",
-       .modes = pmx_sdhci_modes,
-       .mode_count = ARRAY_SIZE(pmx_sdhci_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_i2s_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
-               .mask = PMX_UART0_MODEM_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_i2s = {
-       .name = "i2s",
-       .modes = pmx_i2s_modes,
-       .mode_count = ARRAY_SIZE(pmx_i2s_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_uart1_modes[] = {
-       {
-               .ids = ALL_MODES,
-               .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_uart1 = {
-       .name = "uart1",
-       .modes = pmx_uart1_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_uart1_modem_modes[] = {
-       {
-               .ids = AUTO_EXP_MODE,
-               .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK |
-                       PMX_SSP_CS_MASK,
-       }, {
-               .ids = SMALL_PRINTERS_MODE,
-               .mask = PMX_GPIO_PIN3_MASK | PMX_GPIO_PIN4_MASK |
-                       PMX_GPIO_PIN5_MASK | PMX_SSP_CS_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_uart1_modem = {
-       .name = "uart1_modem",
-       .modes = pmx_uart1_modem_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart1_modem_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_uart2_modes[] = {
-       {
-               .ids = ALL_MODES,
-               .mask = PMX_FIRDA_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_uart2 = {
-       .name = "uart2",
-       .modes = pmx_uart2_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart2_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_touchscreen_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE,
-               .mask = PMX_SSP_CS_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_touchscreen = {
-       .name = "touchscreen",
-       .modes = pmx_touchscreen_modes,
-       .mode_count = ARRAY_SIZE(pmx_touchscreen_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_can_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE,
-               .mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
-                       PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_can = {
-       .name = "can",
-       .modes = pmx_can_modes,
-       .mode_count = ARRAY_SIZE(pmx_can_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_sdhci_led_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
-               .mask = PMX_SSP_CS_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_sdhci_led = {
-       .name = "sdhci_led",
-       .modes = pmx_sdhci_led_modes,
-       .mode_count = ARRAY_SIZE(pmx_sdhci_led_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_pwm0_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
-               .mask = PMX_UART0_MODEM_MASK,
-       }, {
-               .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_pwm0 = {
-       .name = "pwm0",
-       .modes = pmx_pwm0_modes,
-       .mode_count = ARRAY_SIZE(pmx_pwm0_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_pwm1_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
-               .mask = PMX_UART0_MODEM_MASK,
-       }, {
-               .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_pwm1 = {
-       .name = "pwm1",
-       .modes = pmx_pwm1_modes,
-       .mode_count = ARRAY_SIZE(pmx_pwm1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_pwm2_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE,
-               .mask = PMX_SSP_CS_MASK,
-       }, {
-               .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_pwm2 = {
-       .name = "pwm2",
-       .modes = pmx_pwm2_modes,
-       .mode_count = ARRAY_SIZE(pmx_pwm2_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_pwm3_modes[] = {
-       {
-               .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_pwm3 = {
-       .name = "pwm3",
-       .modes = pmx_pwm3_modes,
-       .mode_count = ARRAY_SIZE(pmx_pwm3_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_ssp1_modes[] = {
-       {
-               .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_ssp1 = {
-       .name = "ssp1",
-       .modes = pmx_ssp1_modes,
-       .mode_count = ARRAY_SIZE(pmx_ssp1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_ssp2_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_ssp2 = {
-       .name = "ssp2",
-       .modes = pmx_ssp2_modes,
-       .mode_count = ARRAY_SIZE(pmx_ssp2_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_mii1_modes[] = {
-       {
-               .ids = AUTO_NET_MII_MODE,
-               .mask = 0x0,
-       },
- };
- struct pmx_dev spear320_pmx_mii1 = {
-       .name = "mii1",
-       .modes = pmx_mii1_modes,
-       .mode_count = ARRAY_SIZE(pmx_mii1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_smii0_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_smii0 = {
-       .name = "smii0",
-       .modes = pmx_smii0_modes,
-       .mode_count = ARRAY_SIZE(pmx_smii0_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_smii1_modes[] = {
-       {
-               .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear320_pmx_smii1 = {
-       .name = "smii1",
-       .modes = pmx_smii1_modes,
-       .mode_count = ARRAY_SIZE(pmx_smii1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_i2c1_modes[] = {
-       {
-               .ids = AUTO_EXP_MODE,
-               .mask = 0x0,
-       },
- };
- struct pmx_dev spear320_pmx_i2c1 = {
-       .name = "i2c1",
-       .modes = pmx_i2c1_modes,
-       .mode_count = ARRAY_SIZE(pmx_i2c1_modes),
-       .enb_on_reset = 1,
- };
- /* pmx driver structure */
- static struct pmx_driver pmx_driver = {
-       .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007},
-       .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
- };
  /* spear3xx shared irq */
  static struct shirq_dev_config shirq_ras1_config[] = {
        {
index bbb11efa6056ff1845648027e18fd29a46f9278d,12bf879a9ef146ff00f2c76ee03410f3339d36d8..826ac20ef1e7a3e5202fded05a8e5653c5b439b9
  #include <asm/hardware/vic.h>
  #include <plat/pl080.h>
  #include <mach/generic.h>
 -#include <mach/hardware.h>
 +#include <mach/spear.h>
  
- /* pad multiplexing support */
- /* devices */
- static struct pmx_dev_mode pmx_firda_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_FIRDA_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_firda = {
-       .name = "firda",
-       .modes = pmx_firda_modes,
-       .mode_count = ARRAY_SIZE(pmx_firda_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_i2c_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_I2C_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_i2c = {
-       .name = "i2c",
-       .modes = pmx_i2c_modes,
-       .mode_count = ARRAY_SIZE(pmx_i2c_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_ssp_cs_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_SSP_CS_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_ssp_cs = {
-       .name = "ssp_chip_selects",
-       .modes = pmx_ssp_cs_modes,
-       .mode_count = ARRAY_SIZE(pmx_ssp_cs_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_ssp_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_SSP_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_ssp = {
-       .name = "ssp",
-       .modes = pmx_ssp_modes,
-       .mode_count = ARRAY_SIZE(pmx_ssp_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_mii_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_mii = {
-       .name = "mii",
-       .modes = pmx_mii_modes,
-       .mode_count = ARRAY_SIZE(pmx_mii_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_gpio_pin0_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_GPIO_PIN0_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_gpio_pin0 = {
-       .name = "gpio_pin0",
-       .modes = pmx_gpio_pin0_modes,
-       .mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_gpio_pin1_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_GPIO_PIN1_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_gpio_pin1 = {
-       .name = "gpio_pin1",
-       .modes = pmx_gpio_pin1_modes,
-       .mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_gpio_pin2_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_GPIO_PIN2_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_gpio_pin2 = {
-       .name = "gpio_pin2",
-       .modes = pmx_gpio_pin2_modes,
-       .mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_gpio_pin3_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_GPIO_PIN3_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_gpio_pin3 = {
-       .name = "gpio_pin3",
-       .modes = pmx_gpio_pin3_modes,
-       .mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_gpio_pin4_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_GPIO_PIN4_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_gpio_pin4 = {
-       .name = "gpio_pin4",
-       .modes = pmx_gpio_pin4_modes,
-       .mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_gpio_pin5_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_GPIO_PIN5_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_gpio_pin5 = {
-       .name = "gpio_pin5",
-       .modes = pmx_gpio_pin5_modes,
-       .mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_uart0_modem_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_UART0_MODEM_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_uart0_modem = {
-       .name = "uart0_modem",
-       .modes = pmx_uart0_modem_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart0_modem_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_uart0_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_UART0_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_uart0 = {
-       .name = "uart0",
-       .modes = pmx_uart0_modes,
-       .mode_count = ARRAY_SIZE(pmx_uart0_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_timer_3_4_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_timer_3_4 = {
-       .name = "timer_3_4",
-       .modes = pmx_timer_3_4_modes,
-       .mode_count = ARRAY_SIZE(pmx_timer_3_4_modes),
-       .enb_on_reset = 0,
- };
- static struct pmx_dev_mode pmx_timer_1_2_modes[] = {
-       {
-               .ids = 0xffffffff,
-               .mask = PMX_TIMER_1_2_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_timer_1_2 = {
-       .name = "timer_1_2",
-       .modes = pmx_timer_1_2_modes,
-       .mode_count = ARRAY_SIZE(pmx_timer_1_2_modes),
-       .enb_on_reset = 0,
- };
- #if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320)
- /* plgpios devices */
- static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_FIRDA_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_0_1 = {
-       .name = "plgpio 0 and 1",
-       .modes = pmx_plgpio_0_1_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_UART0_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_2_3 = {
-       .name = "plgpio 2 and 3",
-       .modes = pmx_plgpio_2_3_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_I2C_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_4_5 = {
-       .name = "plgpio 4 and 5",
-       .modes = pmx_plgpio_4_5_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_SSP_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_6_9 = {
-       .name = "plgpio 6 to 9",
-       .modes = pmx_plgpio_6_9_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_MII_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_10_27 = {
-       .name = "plgpio 10 to 27",
-       .modes = pmx_plgpio_10_27_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_28_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_GPIO_PIN0_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_28 = {
-       .name = "plgpio 28",
-       .modes = pmx_plgpio_28_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_28_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_29_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_GPIO_PIN1_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_29 = {
-       .name = "plgpio 29",
-       .modes = pmx_plgpio_29_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_29_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_30_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_GPIO_PIN2_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_30 = {
-       .name = "plgpio 30",
-       .modes = pmx_plgpio_30_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_30_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_31_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_GPIO_PIN3_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_31 = {
-       .name = "plgpio 31",
-       .modes = pmx_plgpio_31_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_31_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_32_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_GPIO_PIN4_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_32 = {
-       .name = "plgpio 32",
-       .modes = pmx_plgpio_32_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_32_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_33_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_GPIO_PIN5_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_33 = {
-       .name = "plgpio 33",
-       .modes = pmx_plgpio_33_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_33_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_SSP_CS_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_34_36 = {
-       .name = "plgpio 34 to 36",
-       .modes = pmx_plgpio_34_36_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_UART0_MODEM_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_37_42 = {
-       .name = "plgpio 37 to 42",
-       .modes = pmx_plgpio_37_42_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_TIMER_1_2_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48 = {
-       .name = "plgpio 43, 44, 47 and 48",
-       .modes = pmx_plgpio_43_44_47_48_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes),
-       .enb_on_reset = 1,
- };
- static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = {
-       {
-               .ids = 0x00,
-               .mask = PMX_TIMER_3_4_MASK,
-       },
- };
- struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50 = {
-       .name = "plgpio 45, 46, 49 and 50",
-       .modes = pmx_plgpio_45_46_49_50_modes,
-       .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes),
-       .enb_on_reset = 1,
- };
- #endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */
  /* ssp device registration */
  struct pl022_ssp_controller pl022_plat_data = {
        .bus_id = 0,
index 0e8470a3fbeb28f5e60ff16d90d2e41b31f093e5,4adb49396665b734083413ef6757d94994000c78..53d3d46dec1290b4265a3c3c26d7ffc0449f223e
@@@ -9,7 -9,13 +9,9 @@@ config UX500_SOC_COMMO
        select ARM_ERRATA_754322
        select ARM_ERRATA_764369
        select CACHE_L2X0
+       select PINCTRL
+       select PINCTRL_NOMADIK
  
 -config UX500_SOC_DB5500
 -      bool
 -      select MFD_DB5500_PRCMU
 -
  config UX500_SOC_DB8500
        bool
        select MFD_DB8500_PRCMU
index fc7db5df970bb93120d7584cec99efaff322342a,11729bc6219438b9b47763be58310cd5cf81e11e..041c35885981f356196811f807ccfa14cba45b2c
@@@ -10,6 -11,11 +10,7 @@@ obj-$(CONFIG_MACH_MOP500)    += board-mop5
                                board-mop500-regulators.o \
                                board-mop500-uib.o board-mop500-stuib.o \
                                board-mop500-u8500uib.o \
-                               board-mop500-pins.o
+                               board-mop500-pins.o \
+                               board-mop500-msp.o
 -obj-$(CONFIG_MACH_U5500)      += board-u5500.o board-u5500-sdi.o
  obj-$(CONFIG_SMP)             += platsmp.o headsmp.o
  obj-$(CONFIG_HOTPLUG_CPU)     += hotplug.o
 -obj-$(CONFIG_U5500_MODEM_IRQ) += modem-irq-db5500.o
 -obj-$(CONFIG_U5500_MBOX)      += mbox-db5500.o
 -
index f8150155a44291477a381cc85506c21af1a83d72,1dc31652b97a2d5d03254cc8bdf323bb14d6ae04..4bc0cbc5f071062c5a817ea59cbb09ba256e1f21
@@@ -645,12 -668,12 +667,11 @@@ static void __init mop500_init_machine(
  static void __init snowball_init_machine(void)
  {
        struct device *parent = NULL;
 -      int i2c0_devs;
        int i;
  
+       snowball_pinmaps_init();
        parent = u8500_init_devices();
  
-       snowball_pins_init();
        for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
                snowball_platform_devs[i]->dev.parent = parent;
  
        mop500_i2c_init(parent);
        snowball_sdi_init(parent);
        mop500_spi_init(parent);
+       mop500_msp_init(parent);
        mop500_uart_init(parent);
  
 -      i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
 -      i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 -      i2c_register_board_info(2, mop500_i2c2_devices,
 -                              ARRAY_SIZE(mop500_i2c2_devices));
 -
        /* This board has full regulator constraints */
        regulator_has_full_constraints();
  }
@@@ -759,7 -799,16 +793,15 @@@ static void __init u8500_init_machine(v
        int i2c0_devs;
        int i;
  
+       /* Pinmaps must be in place before devices register */
+       if (of_machine_is_compatible("st-ericsson,mop500"))
+               mop500_pinmaps_init();
+       else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
+               snowball_pinmaps_init();
+       else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
+               hrefv60_pinmaps_init();
        parent = u8500_init_devices();
 -      i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
  
        for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
                mop500_platform_devs[i]->dev.parent = parent;
                                ARRAY_SIZE(mop500_platform_devs));
  
                mop500_sdi_init(parent);
 +
 +              i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
 +              i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 +              i2c_register_board_info(2, mop500_i2c2_devices,
 +                                      ARRAY_SIZE(mop500_i2c2_devices));
 +
        } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
-               snowball_pins_init();
                platform_add_devices(snowball_platform_devs,
                                ARRAY_SIZE(snowball_platform_devs));
  
                 * instead.
                 */
                mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
-               hrefv60_pins_init();
 -              i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
                platform_add_devices(mop500_platform_devs,
                                ARRAY_SIZE(mop500_platform_devs));
  
Simple merge
Simple merge
Simple merge
Simple merge
index 6fc7eb24d9a0ba7fa8e9abf7f5ccbc1cba7c67d0,e22b78626068d412d31577adf1db254bcd1b915e..0b9677a95bbcab42286a64d126274000637d7db1
@@@ -31,10 -31,9 +31,9 @@@ static inline struct amba_device 
  db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
               int irq, struct pl022_ssp_controller *pdata)
  {
 -      return dbx500_add_amba_device(parent, name, base, irq, pdata, 0);
 +      return amba_ahb_device_add(parent, name, base, SZ_4K, irq, 0, pdata, 0);
  }
  
  #define db8500_add_i2c0(parent, pdata) \
        dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
  #define db8500_add_i2c1(parent, pdata) \
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge