ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
authorTero Kristo <t-kristo@ti.com>
Mon, 31 Mar 2014 15:15:43 +0000 (18:15 +0300)
committerPaul Walmsley <paul@pwsan.com>
Fri, 16 May 2014 04:34:54 +0000 (22:34 -0600)
This helps to make the PRM registration modular, and also gets rid of a
cpu type check done later.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/prcm-common.h
arch/arm/mach-omap2/prm3xxx.c
arch/arm/mach-omap2/prm44xx.c
arch/arm/mach-omap2/prm_common.c

index ee2384a983bc708f29bc0d9b20b58180d7df00c9..a8e4b582c527476972de36917c144570dd3665b4 100644 (file)
@@ -480,6 +480,7 @@ struct omap_prcm_irq {
  * @ocp_barrier: fn ptr to force buffered PRM writes to complete
  * @save_and_clear_irqen: fn ptr to save and clear IRQENABLE regs
  * @restore_irqen: fn ptr to save and clear IRQENABLE regs
+ * @reconfigure_io_chain: fn ptr to reconfigure IO chain
  * @saved_mask: IRQENABLE regs are saved here during suspend
  * @priority_mask: 1 bit per IRQ, set to 1 if omap_prcm_irq.priority = true
  * @base_irq: base dynamic IRQ number, returned from irq_alloc_descs() in init
@@ -501,6 +502,7 @@ struct omap_prcm_irq_setup {
        void (*ocp_barrier)(void);
        void (*save_and_clear_irqen)(u32 *saved_mask);
        void (*restore_irqen)(u32 *saved_mask);
+       void (*reconfigure_io_chain)(void);
        u32 *saved_mask;
        u32 *priority_mask;
        int base_irq;
index 4c89aa2f1e81b829f8ee41c9a095a9c655ef2097..2631b9f2b3d83edd593ed4d8dcda5dcd3fb8eb33 100644 (file)
@@ -43,6 +43,7 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
        .ocp_barrier            = &omap3xxx_prm_ocp_barrier,
        .save_and_clear_irqen   = &omap3xxx_prm_save_and_clear_irqen,
        .restore_irqen          = &omap3xxx_prm_restore_irqen,
+       .reconfigure_io_chain   = &omap3xxx_prm_reconfigure_io_chain,
 };
 
 /*
index 15171890f805afe3f8ad6fa542d053b295d57132..f464179eb82b39bc468d7aa6e5451e3342a16b06 100644 (file)
@@ -47,6 +47,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
        .ocp_barrier            = &omap44xx_prm_ocp_barrier,
        .save_and_clear_irqen   = &omap44xx_prm_save_and_clear_irqen,
        .restore_irqen          = &omap44xx_prm_restore_irqen,
+       .reconfigure_io_chain   = &omap44xx_prm_reconfigure_io_chain,
 };
 
 /*
index b4c4ab9c8044476d0777ed04cb8c9595d2f29f83..bd746fc05d18775e94fef1c855406fa95f05b6c6 100644 (file)
@@ -330,12 +330,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
 
        if (of_have_populated_dt()) {
                int irq = omap_prcm_event_to_irq("io");
-               if (cpu_is_omap34xx())
-                       omap_pcs_legacy_init(irq,
-                               omap3xxx_prm_reconfigure_io_chain);
-               else
-                       omap_pcs_legacy_init(irq,
-                               omap44xx_prm_reconfigure_io_chain);
+               omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
        }
 
        return 0;