ARM: ux500: switch SSP/SPI clock name to "SSPCLK"
authorLinus Walleij <linus.walleij@linaro.org>
Mon, 24 Feb 2014 12:30:15 +0000 (13:30 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 26 Feb 2014 12:35:49 +0000 (13:35 +0100)
As noted in recent discussions the name of the core clock for
the PL022 derived SPI blocks is erroneously named in the
Ux500 device trees. The kernel doesn't currently use the name,
but may do so soon so let use rename all these clocks in
accordance with the name given in the PL022 TRM (ARM DDI 0194G).

Reviewed-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-dbx5x0.dtsi

index e0853ea02df2296dc78c997123f3173754df48a8..e41eedca3ce3c562a27fff268f09c43429cbc10f 100644 (file)
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&prcc_kclk 3 1>, <&prcc_pclk 3 1>;
-                       clock-names = "ssp0clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 8 0 0x2>, /* Logical - DevToMem */
                               <&dma 8 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&prcc_kclk 3 2>, <&prcc_pclk 3 2>;
-                       clock-names = "ssp1clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 9 0 0x2>, /* Logical - DevToMem */
                               <&dma 9 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 2 8>, <&prcc_pclk 2 8>;
-                       clock-names = "spi0clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 0 0 0x2>, /* Logical - DevToMem */
                               <&dma 0 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 2 2>, <&prcc_pclk 2 2>;
-                       clock-names = "spi1clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 35 0 0x2>, /* Logical - DevToMem */
                               <&dma 35 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 2 1>, <&prcc_pclk 2 1>;
-                       clock-names = "spi2clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 33 0 0x2>, /* Logical - DevToMem */
                               <&dma 33 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";
                        #size-cells = <0>;
                        /* Same clock wired to kernel and pclk */
                        clocks = <&prcc_pclk 1 7>, <&prcc_pclk 1 7>;
-                       clock-names = "spi3clk", "apb_pclk";
+                       clock-names = "SSPCLK", "apb_pclk";
                        dmas = <&dma 40 0 0x2>, /* Logical - DevToMem */
                               <&dma 40 0 0x0>; /* Logical - MemToDev */
                        dma-names = "rx", "tx";