ARM: imx: add standby mode support for suspend
authorAnson Huang <b20788@freescale.com>
Mon, 23 Jun 2014 08:42:44 +0000 (16:42 +0800)
committerShawn Guo <shawn.guo@freescale.com>
Fri, 18 Jul 2014 08:11:30 +0000 (16:11 +0800)
Add standby mode support for suspend, to enter standby mode:

echo standby > /sys/power/state;

Use UART or RTC alarm to wake up system, when system enters
standby mode, SOC will enter STOP mode with ARM core kept
power on and 24M XTAL on.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
arch/arm/mach-imx/common.h
arch/arm/mach-imx/gpc.c
arch/arm/mach-imx/pm-imx6.c

index 13a6e1f8e11e8325f47cddba63163d1e53db8c4a..d205f362cf29e6a7be6ef368466b71593bb9785b 100644 (file)
@@ -106,7 +106,7 @@ static inline void imx_scu_standby_enable(void) {}
 #endif
 void imx_src_init(void);
 void imx_gpc_init(void);
-void imx_gpc_pre_suspend(void);
+void imx_gpc_pre_suspend(bool arm_power_off);
 void imx_gpc_post_resume(void);
 void imx_gpc_mask_all(void);
 void imx_gpc_restore_all(void);
index 586e0171a65294200bb2d1a0c9115c73975fb2aa..82ea74e68482433bd32f58cfed7fb540008a61b0 100644 (file)
@@ -27,13 +27,14 @@ static void __iomem *gpc_base;
 static u32 gpc_wake_irqs[IMR_NUM];
 static u32 gpc_saved_imrs[IMR_NUM];
 
-void imx_gpc_pre_suspend(void)
+void imx_gpc_pre_suspend(bool arm_power_off)
 {
        void __iomem *reg_imr1 = gpc_base + GPC_IMR1;
        int i;
 
        /* Tell GPC to power off ARM core when suspend */
-       writel_relaxed(0x1, gpc_base + GPC_PGC_CPU_PDN);
+       if (arm_power_off)
+               writel_relaxed(0x1, gpc_base + GPC_PGC_CPU_PDN);
 
        for (i = 0; i < IMR_NUM; i++) {
                gpc_saved_imrs[i] = readl_relaxed(reg_imr1 + i * 4);
index b3c770d0cc3f823d9e008b12a2e0e233357e0e18..5c3af8f993d0c490db6c58a7a8c349e0fb282fc6 100644 (file)
@@ -274,6 +274,14 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
                break;
        case STOP_POWER_ON:
                val |= 0x2 << BP_CLPCR_LPM;
+               val &= ~BM_CLPCR_VSTBY;
+               val &= ~BM_CLPCR_SBYOS;
+               if (cpu_is_imx6sl())
+                       val |= BM_CLPCR_BYPASS_PMIC_READY;
+               if (cpu_is_imx6sl() || cpu_is_imx6sx())
+                       val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
+               else
+                       val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
                break;
        case WAIT_UNCLOCKED_POWER_OFF:
                val |= 0x1 << BP_CLPCR_LPM;
@@ -334,6 +342,19 @@ static int imx6q_suspend_finish(unsigned long val)
 static int imx6q_pm_enter(suspend_state_t state)
 {
        switch (state) {
+       case PM_SUSPEND_STANDBY:
+               imx6q_set_lpm(STOP_POWER_ON);
+               imx6q_set_int_mem_clk_lpm(true);
+               imx_gpc_pre_suspend(false);
+               if (cpu_is_imx6sl())
+                       imx6sl_set_wait_clk(true);
+               /* Zzz ... */
+               cpu_do_idle();
+               if (cpu_is_imx6sl())
+                       imx6sl_set_wait_clk(false);
+               imx_gpc_post_resume();
+               imx6q_set_lpm(WAIT_CLOCKED);
+               break;
        case PM_SUSPEND_MEM:
                imx6q_set_lpm(STOP_POWER_OFF);
                imx6q_set_int_mem_clk_lpm(false);
@@ -344,7 +365,7 @@ static int imx6q_pm_enter(suspend_state_t state)
                 */
                if (!imx6_suspend_in_ocram_fn)
                        imx6q_enable_rbc(true);
-               imx_gpc_pre_suspend();
+               imx_gpc_pre_suspend(true);
                imx_anatop_pre_suspend();
                imx_set_cpu_jump(0, v7_cpu_resume);
                /* Zzz ... */
@@ -365,9 +386,14 @@ static int imx6q_pm_enter(suspend_state_t state)
        return 0;
 }
 
+static int imx6q_pm_valid(suspend_state_t state)
+{
+       return (state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM);
+}
+
 static const struct platform_suspend_ops imx6q_pm_ops = {
        .enter = imx6q_pm_enter,
-       .valid = suspend_valid_only_mem,
+       .valid = imx6q_pm_valid,
 };
 
 void __init imx6q_pm_set_ccm_base(void __iomem *base)