ARM: dts: apq8064: add i2c6 device node.

This patch adds i2c6 device node and pinctrls required for IFC6410 on
MIPI-CSI connector.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
index 0cb22cf066479607cd177b73e71fcc8ed4261a6f..b57c59d5bc00b6a48eaa844d630ff094fcfbc7a3 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064-pins.dtsi
@@ -153,6 +153,31 @@
                };
        };
 
+       i2c6_pins: i2c6 {
+               mux {
+                       pins = "gpio16", "gpio17";
+                       function = "gsbi6";
+               };
+
+               pinconf {
+                       pins = "gpio16", "gpio17";
+                       drive-strength = <16>;
+                       bias-disable;
+               };
+       };
+
+       i2c6_pins_sleep: i2c6_pins_sleep {
+               mux {
+                       pins = "gpio16", "gpio17";
+                       function = "gpio";
+               };
+               pinconf {
+                       pins = "gpio16", "gpio17";
+                       drive-strength = <2>;
+                       bias-disable = <0>;
+               };
+       };
+
        gsbi6_uart_2pins: gsbi6_uart_2pins {
                mux {
                        pins = "gpio14", "gpio15";

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 766fead5d4e3039bb75a75f0d8e9f93a6d9b81a4..609123ead90edfd54e581e031e2e47e141a33902 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -367,6 +367,17 @@
                                clock-names = "core", "iface";
                                status = "disabled";
                        };
+
+                       gsbi6_i2c: i2c@16580000 {
+                               compatible = "qcom,i2c-qup-v1.1.1";
+                               pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
+                               pinctrl-names = "default", "sleep";
+                               reg = <0x16580000 0x1000>;
+                               interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
+                               clocks = <&gcc GSBI6_QUP_CLK>,
+                                        <&gcc GSBI6_H_CLK>;
+                               clock-names = "core", "iface";
+                       };
                };
 
                gsbi7: gsbi@16600000 {