ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B

The Pi 2 B ends up like a Pi 1 B+, with the same peripherals and
pinout, but the CPU and memory layout changed to use the 2836.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f70d4c1c49e4ee7539164175eb6264ccc809c146..a4a6d70e8b26ceaf2d9dc7b3af37e4e4bb32eba1 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -62,7 +62,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
        bcm2835-rpi-b.dtb \
        bcm2835-rpi-b-rev2.dtb \
        bcm2835-rpi-b-plus.dtb \
-       bcm2835-rpi-a-plus.dtb
+       bcm2835-rpi-a-plus.dtb \
+       bcm2836-rpi-2-b.dtb
 dtb-$(CONFIG_ARCH_BCM_5301X) += \
        bcm4708-asus-rt-ac56u.dtb \
        bcm4708-asus-rt-ac68u.dtb \

diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
new file mode 100644 (file)
index 0000000..ff94666
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -0,0 +1,35 @@
+/dts-v1/;
+#include "bcm2836.dtsi"
+#include "bcm2835-rpi.dtsi"
+
+/ {
+       compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
+       model = "Raspberry Pi 2 Model B";
+
+       memory {
+               reg = <0 0x40000000>;
+       };
+
+       leds {
+               act {
+                       gpios = <&gpio 47 0>;
+               };
+
+               pwr {
+                       label = "PWR";
+                       gpios = <&gpio 35 0>;
+                       default-state = "keep";
+                       linux,default-trigger = "default-on";
+               };
+       };
+};
+
+&gpio {
+       pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
+
+       /* I2S interface */
+       i2s_alt0: i2s_alt0 {
+               brcm,pins = <18 19 20 21>;
+               brcm,function = <BCM2835_FSEL_ALT0>;
+       };
+};

diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi
new file mode 100644 (file)
index 0000000..9d0651d
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2836.dtsi
@@ -0,0 +1,78 @@
+#include "bcm283x.dtsi"
+
+/ {
+       compatible = "brcm,bcm2836";
+
+       soc {
+               ranges = <0x7e000000 0x3f000000 0x1000000>,
+                        <0x40000000 0x40000000 0x00001000>;
+               dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
+
+               local_intc: local_intc {
+                       compatible = "brcm,bcm2836-l1-intc";
+                       reg = <0x40000000 0x100>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&local_intc>;
+               };
+
+               arm-pmu {
+                       compatible = "arm,cortex-a7-pmu";
+                       interrupt-parent = <&local_intc>;
+                       interrupts = <9>;
+               };
+       };
+
+       timer {
+               compatible = "arm,armv7-timer";
+               interrupt-parent = <&local_intc>;
+               interrupts = <0>, // PHYS_SECURE_PPI
+                            <1>, // PHYS_NONSECURE_PPI
+                            <3>, // VIRT_PPI
+                            <2>; // HYP_PPI
+               always-on;
+       };
+
+       cpus: cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               v7_cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0xf00>;
+                       clock-frequency = <800000000>;
+               };
+
+               v7_cpu1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0xf01>;
+                       clock-frequency = <800000000>;
+               };
+
+               v7_cpu2: cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0xf02>;
+                       clock-frequency = <800000000>;
+               };
+
+               v7_cpu3: cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0xf03>;
+                       clock-frequency = <800000000>;
+               };
+       };
+};
+
+/* Make the BCM2835-style global interrupt controller be a child of the
+ * CPU-local interrupt controller.
+ */
+&intc {
+       compatible = "brcm,bcm2836-armctrl-ic";
+       reg = <0x7e00b200 0x200>;
+       interrupt-parent = <&local_intc>;
+       interrupts = <8>;
+};