drm/i915: Move HAS_GMCH_DISPLAY definition to platform

Moving all GPU features to the platform definition allows for
        - standard place when adding new features from new platforms
        - possible to see supported features when dumping struct
          definitions

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 112e378d1937b5497adc6bf9badd1639430f6f2e..fcba6fe3caafdbc519666337149789ae0088c8e3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -665,6 +665,7 @@ struct intel_csr {
        func(has_hw_contexts) sep \
        func(has_logical_ring_contexts) sep \
        func(has_l3_dpf) sep \
+       func(has_gmch_display) sep \
        func(has_pipe_cxsr) sep \
        func(has_hotplug) sep \
        func(cursor_needs_physical) sep \
@@ -2838,8 +2839,7 @@ struct drm_i915_cmd_table {
 #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
 #define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
 
-#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || \
-                              IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->has_gmch_display)
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev) (INTEL_INFO(dev)->has_l3_dpf)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e192df929dde94c83437922034596b5ae78a75d3..0f1eb4a5153d83b88b48d31d3d89864d4be720af 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -57,6 +57,7 @@
 #define GEN2_FEATURES \
        .gen = 2, .num_pipes = 1, \
        .has_overlay = 1, .overlay_needs_physical = 1, \
+       .has_gmch_display = 1, \
        .ring_mask = RENDER_RING, \
        GEN_DEFAULT_PIPEOFFSETS, \
        CURSOR_OFFSETS
@@ -85,6 +86,7 @@ static const struct intel_device_info intel_i865g_info = {
 
 #define GEN3_FEATURES \
        .gen = 3, .num_pipes = 2, \
+       .has_gmch_display = 1, \
        .ring_mask = RENDER_RING, \
        GEN_DEFAULT_PIPEOFFSETS, \
        CURSOR_OFFSETS
@@ -119,6 +121,7 @@ static const struct intel_device_info intel_i945gm_info = {
 #define GEN4_FEATURES \
        .gen = 4, .num_pipes = 2, \
        .has_hotplug = 1, \
+       .has_gmch_display = 1, \
        .ring_mask = RENDER_RING, \
        GEN_DEFAULT_PIPEOFFSETS, \
        CURSOR_OFFSETS
@@ -246,6 +249,7 @@ static const struct intel_device_info intel_ivybridge_q_info = {
        .has_rc6 = 1, \
        .has_gmbus_irq = 1, \
        .has_hw_contexts = 1, \
+       .has_gmch_display = 1, \
        .need_gfx_hws = 1, .has_hotplug = 1, \
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \
        .display_mmio_offset = VLV_DISPLAY_BASE, \
@@ -304,6 +308,7 @@ static const struct intel_device_info intel_cherryview_info = {
        .has_gmbus_irq = 1,
        .has_hw_contexts = 1,
        .has_logical_ring_contexts = 1,
+       .has_gmch_display = 1,
        .display_mmio_offset = VLV_DISPLAY_BASE,
        GEN_CHV_PIPEOFFSETS,
        CURSOR_OFFSETS,