Besides the two "classic" USB interfaces with normal USB ports on the
front side, the PlatHome OpenBlocks AX3 uses the third USB interface
of the Marvell SoC in the mini-PCIe connector. This allows certain
mini-PCIe cards to expose parts of their functionality as a USB
peripheral.
This commit enables this third USB interface in the OpenBlocks AX3
Device Tree, and also adds comments on top of the two other USB
interfaces so that the Device Tree makes it clear which USB interface
at the SoC level matches which USB interface visible on the board.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Atsushi Yamagata <yamagata@plathome.co.jp>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
nr-ports = <2>;
status = "okay";
};
+
+ /* Front side USB 0 */
usb@50000 {
status = "okay";
};
+
+ /* Front side USB 1 */
usb@51000 {
status = "okay";
};
+ /* USB interface in the mini-PCIe connector */
+ usb@52000 {
+ status = "okay";
+ };
+
devbus-bootcs@10400 {
status = "okay";
ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */