*
* This register is used to control the frequency of the hclk and the hreset and phy_rst signals.
*/
-union cvmx_usbnx_clk_ctl
-{
+union cvmx_usbnx_clk_ctl {
uint64_t u64;
- struct cvmx_usbnx_clk_ctl_s
- {
+ struct cvmx_usbnx_clk_ctl_s {
uint64_t reserved_20_63 : 44;
uint64_t divide2 : 2; /**< The 'hclk' used by the USB subsystem is derived
from the eclk.
The ENABLE field of this register should not be set
until AFTER this field is set and then read. */
} s;
- struct cvmx_usbnx_clk_ctl_cn30xx
- {
+ struct cvmx_usbnx_clk_ctl_cn30xx {
uint64_t reserved_18_63 : 46;
uint64_t hclk_rst : 1; /**< When this field is '0' the HCLK-DIVIDER used to
generate the hclk in the USB Subsystem is held
The hclk frequency must be less than 125 MHz. */
} cn30xx;
struct cvmx_usbnx_clk_ctl_cn30xx cn31xx;
- struct cvmx_usbnx_clk_ctl_cn50xx
- {
+ struct cvmx_usbnx_clk_ctl_cn50xx {
uint64_t reserved_20_63 : 44;
uint64_t divide2 : 2; /**< The 'hclk' used by the USB subsystem is derived
from the eclk.
*
* Contains general control and status information for the USBN block.
*/
-union cvmx_usbnx_usbp_ctl_status
-{
+union cvmx_usbnx_usbp_ctl_status {
uint64_t u64;
- struct cvmx_usbnx_usbp_ctl_status_s
- {
+ struct cvmx_usbnx_usbp_ctl_status_s {
uint64_t txrisetune : 1; /**< HS Transmitter Rise/Fall Time Adjustment */
uint64_t txvreftune : 4; /**< HS DC Voltage Level Adjustment */
uint64_t txfslstune : 4; /**< FS/LS Source Impedence Adjustment */
are available within a specific period after the
de-assertion. */
} s;
- struct cvmx_usbnx_usbp_ctl_status_cn30xx
- {
+ struct cvmx_usbnx_usbp_ctl_status_cn30xx {
uint64_t reserved_38_63 : 26;
uint64_t bist_done : 1; /**< PHY Bist Done.
Asserted at the end of the PHY BIST sequence. */
are available within a specific period after the
de-assertion. */
} cn30xx;
- struct cvmx_usbnx_usbp_ctl_status_cn50xx
- {
+ struct cvmx_usbnx_usbp_ctl_status_cn50xx {
uint64_t txrisetune : 1; /**< HS Transmitter Rise/Fall Time Adjustment */
uint64_t txvreftune : 4; /**< HS DC Voltage Level Adjustment */
uint64_t txfslstune : 4; /**< FS/LS Source Impedence Adjustment */
are available within a specific period after the
de-assertion. */
} cn50xx;
- struct cvmx_usbnx_usbp_ctl_status_cn52xx
- {
+ struct cvmx_usbnx_usbp_ctl_status_cn52xx {
uint64_t txrisetune : 1; /**< HS Transmitter Rise/Fall Time Adjustment */
uint64_t txvreftune : 4; /**< HS DC Voltage Level Adjustment */
uint64_t txfslstune : 4; /**< FS/LS Source Impedence Adjustment */