.regs = mt2701_regs,
.type = PWRAP_MT2701,
.arb_en_all = 0x3f,
- .int_en_all = ~(BIT(31) | BIT(2)),
+ .int_en_all = ~(u32)(BIT(31) | BIT(2)),
.spi_w = PWRAP_MAN_CMD_SPI_WRITE_NEW,
.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
.has_bridge = 0,
.regs = mt8135_regs,
.type = PWRAP_MT8135,
.arb_en_all = 0x1ff,
- .int_en_all = ~(BIT(31) | BIT(1)),
+ .int_en_all = ~(u32)(BIT(31) | BIT(1)),
.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
.wdt_src = PWRAP_WDT_SRC_MASK_ALL,
.has_bridge = 1,
.regs = mt8173_regs,
.type = PWRAP_MT8173,
.arb_en_all = 0x3f,
- .int_en_all = ~(BIT(31) | BIT(1)),
+ .int_en_all = ~(u32)(BIT(31) | BIT(1)),
.spi_w = PWRAP_MAN_CMD_SPI_WRITE,
.wdt_src = PWRAP_WDT_SRC_MASK_NO_STAUPD,
.has_bridge = 0,