davinci: move DDR2 controller defines to memory.h
authorSekhar Nori <nsekhar@ti.com>
Mon, 16 Nov 2009 11:51:34 +0000 (17:21 +0530)
committerKevin Hilman <khilman@deeprootsystems.com>
Thu, 4 Feb 2010 21:29:35 +0000 (13:29 -0800)
Move defintions of DDR2 controller registers to memory.h
from cpuidle.c. The motivation behind the change is to be
able to use these defintions in assembly code that puts
DDR2 in self-refresh and enables the SoC to enter suspend
state.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
arch/arm/mach-davinci/cpuidle.c
arch/arm/mach-davinci/include/mach/memory.h

index 97a90f36fc92cd3761c1054f0b2dab5120bd965f..beda3b5796885b16aa9f082101a43297e65240bd 100644 (file)
@@ -19,6 +19,7 @@
 #include <asm/proc-fns.h>
 
 #include <mach/cpuidle.h>
+#include <mach/memory.h>
 
 #define DAVINCI_CPUIDLE_MAX_STATES     2
 
@@ -39,10 +40,6 @@ static struct cpuidle_driver davinci_idle_driver = {
 static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
 static void __iomem *ddr2_reg_base;
 
-#define DDR2_SDRCR_OFFSET      0xc
-#define DDR2_SRPD_BIT          BIT(23)
-#define DDR2_LPMODEN_BIT       BIT(31)
-
 static void davinci_save_ddr_power(int enter, bool pdown)
 {
        u32 val;
index 80309aed534ab0f2073adf49a963cb48e36cb31a..7aeaf46cade0d25cce4fc483116a9f1f7471e465 100644 (file)
 #define PHYS_OFFSET DAVINCI_DDR_BASE
 #endif
 
+#define DDR2_SDRCR_OFFSET      0xc
+#define DDR2_SRPD_BIT          BIT(23)
+#define DDR2_LPMODEN_BIT       BIT(31)
+
 /*
  * Increase size of DMA-consistent memory region
  */