drm/i915: dump even more into the error_state
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 1 Feb 2012 21:26:45 +0000 (22:26 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 9 Feb 2012 14:50:23 +0000 (15:50 +0100)
Chris Wilson and me have again stared at funny error states and it's
been pretty clear from the start that something was seriously amiss.
The seqnos last seen by the cpu were a few hundred behind those that
the gpu could have possibly emitted last before it died ...

Chris now tracked it down (hopefully, definit verdict's still out),
but in hindsight we'd have found the bug by simply dumping the cpu
side tracking of the ring head and tail registers.

Fix this and prevent an identical time-waster in the future.

Because the hangs always involved semaphores in one way or another,
we've tried to dump the mbox registers, but couldn't find any
inconsistencies. Still, dump them too.

Reviewed-and-wanted-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c

index 4ebca6d0494fead443a96b3241637b13da8795e9..f3fe2f872d5a96a494004c237a7a3275efca7161 100644 (file)
@@ -721,8 +721,14 @@ static void i915_ring_error_state(struct seq_file *m,
        if (INTEL_INFO(dev)->gen >= 6) {
                seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
                seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
+               seq_printf(m, "  SYNC_0: 0x%08x\n",
+                          error->semaphore_mboxes[ring][0]);
+               seq_printf(m, "  SYNC_1: 0x%08x\n",
+                          error->semaphore_mboxes[ring][1]);
        }
        seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
+       seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
+       seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 }
 
 static int i915_error_state(struct seq_file *m, void *unused)
index 08454192c4c7a1e5ab0a6d67590170975e2da606..28740bc0200a2b632dbab61952489a280f033b53 100644 (file)
@@ -159,6 +159,10 @@ struct drm_i915_error_state {
        u32 ipehr[I915_NUM_RINGS];
        u32 instdone[I915_NUM_RINGS];
        u32 acthd[I915_NUM_RINGS];
+       u32 semaphore_mboxes[I915_NUM_RINGS][I915_NUM_RINGS - 1];
+       /* our own tracking of ring head and tail */
+       u32 cpu_ring_head[I915_NUM_RINGS];
+       u32 cpu_ring_tail[I915_NUM_RINGS];
        u32 error; /* gen6+ */
        u32 instpm[I915_NUM_RINGS];
        u32 instps[I915_NUM_RINGS];
index 8ea1ca4158a03370355d05cf7ca2aab68dfbf724..cde1ce94563ca326ef5b2d8b367bd83a1fb5470d 100644 (file)
@@ -903,6 +903,10 @@ static void i915_record_ring_state(struct drm_device *dev,
        if (INTEL_INFO(dev)->gen >= 6) {
                error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base));
                error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring));
+               error->semaphore_mboxes[ring->id][0]
+                       = I915_READ(RING_SYNC_0(ring->mmio_base));
+               error->semaphore_mboxes[ring->id][1]
+                       = I915_READ(RING_SYNC_1(ring->mmio_base));
        }
 
        if (INTEL_INFO(dev)->gen >= 4) {
@@ -925,6 +929,9 @@ static void i915_record_ring_state(struct drm_device *dev,
        error->acthd[ring->id] = intel_ring_get_active_head(ring);
        error->head[ring->id] = I915_READ_HEAD(ring);
        error->tail[ring->id] = I915_READ_TAIL(ring);
+
+       error->cpu_ring_head[ring->id] = ring->head;
+       error->cpu_ring_tail[ring->id] = ring->tail;
 }
 
 /**