Blackfin arch: do not muck with the UART during boot -- let the serial driver worry...

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

diff --git a/arch/blackfin/mach-bf527/head.S b/arch/blackfin/mach-bf527/head.S
index fa4b18eddf635c861aa684ff34dbf9e3e112a595..c3334cc5bcb7db9f724a4f57d75813fe4ccdae8c 100644 (file)
--- a/arch/blackfin/mach-bf527/head.S
+++ b/arch/blackfin/mach-bf527/head.S
@@ -35,42 +35,6 @@
 #include <asm/mach/mem_init.h>
 #endif
 
-.extern _bf53x_relocate_l1_mem
-
-__INIT
-
-ENTRY(_mach_early_start)
-       /* Initialise UART - when booting from u-boot, the UART is not disabled
-        * so if we dont initalize here, our serial console gets hosed */
-       p0.h = hi(UART1_LCR);
-       p0.l = lo(UART1_LCR);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable DLL writes */
-       ssync;
-
-       p0.h = hi(UART1_DLL);
-       p0.l = lo(UART1_DLL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(UART1_DLH);
-       p0.l = lo(UART1_DLH);
-       r0 = 0x00(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(UART1_GCTL);
-       p0.l = lo(UART1_GCTL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable UART clock */
-       ssync;
-
-       rts;
-ENDPROC(_mach_early_start)
-
-__FINIT
-
 .section .l1.text
 #ifdef CONFIG_BFIN_KERNEL_CLOCK
 ENTRY(_start_dma_code)

diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S
index 184296bee3c9b43035c568f20e0380d2fee4a649..d59db86195b6ff50f3b160d5a9b0301f23390979 100644 (file)
--- a/arch/blackfin/mach-bf533/head.S
+++ b/arch/blackfin/mach-bf533/head.S
@@ -35,54 +35,6 @@
 #include <asm/mach/mem_init.h>
 #endif
 
-.extern _bf53x_relocate_l1_mem
-
-__INIT
-
-ENTRY(_mach_early_start)
-       p0.h = hi(FIO_MASKA_C);
-       p0.l = lo(FIO_MASKA_C);
-       r0 = 0xFFFF(Z);
-       w[p0] = r0.L;   /* Disable all interrupts */
-       ssync;
-
-       p0.h = hi(FIO_MASKB_C);
-       p0.l = lo(FIO_MASKB_C);
-       r0 = 0xFFFF(Z);
-       w[p0] = r0.L;   /* Disable all interrupts */
-       ssync;
-
-       /* Initialise UART - when booting from u-boot, the UART is not disabled
-        * so if we dont initalize here, our serial console gets hosed */
-       p0.h = hi(BFIN_UART_LCR);
-       p0.l = lo(BFIN_UART_LCR);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable DLL writes */
-       ssync;
-
-       p0.h = hi(BFIN_UART_DLL);
-       p0.l = lo(BFIN_UART_DLL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(BFIN_UART_DLH);
-       p0.l = lo(BFIN_UART_DLH);
-       r0 = 0x00(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(BFIN_UART_GCTL);
-       p0.l = lo(BFIN_UART_GCTL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable UART clock */
-       ssync;
-
-       rts;
-ENDPROC(_mach_early_start)
-
-__FINIT
-
 .section .l1.text
 #ifdef CONFIG_BFIN_KERNEL_CLOCK
 ENTRY(_start_dma_code)

diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index ba81b779511d28fd8ebd7e272e3cfc65d8ece8de..64e0287ab2661adfd8b8668cca8e41c134d34cb2 100644 (file)
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -35,56 +35,6 @@
 #include <asm/mach/mem_init.h>
 #endif
 
-.extern _bf53x_relocate_l1_mem
-
-__INIT
-
-ENTRY(_mach_early_start)
-       /* Initialise General-Purpose I/O Modules on BF537 */
-       p0.h = hi(BFIN_PORT_MUX);
-       p0.l = lo(BFIN_PORT_MUX);
-       R0 = (PGDE_UART | PFTE_UART)(Z);
-       W[P0] = R0.L; /* Enable both UARTS */
-       SSYNC;
-
-       /* Enable peripheral function of PORTF for UART0 and UART1 */
-       p0.h = hi(PORTF_FER);
-       p0.l = lo(PORTF_FER);
-       R0 = 0x000F(Z);
-       W[P0] = R0.L;
-       SSYNC;
-
-       /* Initialise UART - when booting from u-boot, the UART is not disabled
-        * so if we dont initalize here, our serial console gets hosed */
-       p0.h = hi(BFIN_UART_LCR);
-       p0.l = lo(BFIN_UART_LCR);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable DLL writes */
-       ssync;
-
-       p0.h = hi(BFIN_UART_DLL);
-       p0.l = lo(BFIN_UART_DLL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(BFIN_UART_DLH);
-       p0.l = lo(BFIN_UART_DLH);
-       r0 = 0x00(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(BFIN_UART_GCTL);
-       p0.l = lo(BFIN_UART_GCTL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable UART clock */
-       ssync;
-
-       rts;
-ENDPROC(_mach_early_start)
-
-__FINIT
-
 .section .l1.text
 #ifdef CONFIG_BFIN_KERNEL_CLOCK
 ENTRY(_start_dma_code)

diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
index 0b18196df869624488b0218d05dbb1f449b55996..e3000f70a26e034701b558c67ae3dfd4493ac466 100644 (file)
--- a/arch/blackfin/mach-bf548/head.S
+++ b/arch/blackfin/mach-bf548/head.S
@@ -35,16 +35,6 @@
 #include <asm/mach/mem_init.h>
 #endif
 
-.extern _bf53x_relocate_l1_mem
-
-__INIT
-
-ENTRY(_mach_early_start)
-       rts;
-ENDPROC(_mach_early_start)
-
-__FINIT
-
 .section .l1.text
 #ifdef CONFIG_BFIN_KERNEL_CLOCK
 ENTRY(_start_dma_code)

diff --git a/arch/blackfin/mach-bf561/head.S b/arch/blackfin/mach-bf561/head.S
index fe6f979947c66395a6baf769eaef90b80428db39..c7a81e34703d286ae21da5f0a91009ae3d7d19a3 100644 (file)
--- a/arch/blackfin/mach-bf561/head.S
+++ b/arch/blackfin/mach-bf561/head.S
@@ -35,42 +35,6 @@
 #include <asm/mach/mem_init.h>
 #endif
 
-.extern _bf53x_relocate_l1_mem
-
-__INIT
-
-ENTRY(_mach_early_start)
-       /* Initialise UART - when booting from u-boot, the UART is not disabled
-        * so if we dont initalize here, our serial console gets hosed */
-       p0.h = hi(BFIN_UART_LCR);
-       p0.l = lo(BFIN_UART_LCR);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable DLL writes */
-       ssync;
-
-       p0.h = hi(BFIN_UART_DLL);
-       p0.l = lo(BFIN_UART_DLL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(BFIN_UART_DLH);
-       p0.l = lo(BFIN_UART_DLH);
-       r0 = 0x00(Z);
-       w[p0] = r0.L;
-       ssync;
-
-       p0.h = hi(BFIN_UART_GCTL);
-       p0.l = lo(BFIN_UART_GCTL);
-       r0 = 0x0(Z);
-       w[p0] = r0.L;   /* To enable UART clock */
-       ssync;
-
-       rts;
-ENDPROC(_mach_early_start)
-
-__FINIT
-
 .section .l1.text
 #ifdef CONFIG_BFIN_KERNEL_CLOCK
 ENTRY(_start_dma_code)

diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S
index fb7e2d426999a073198661487c2d0d9bbdde41eb..191b4e974c4b6288047e3d74ef507fb69b5119f4 100644 (file)
--- a/arch/blackfin/mach-common/head.S
+++ b/arch/blackfin/mach-common/head.S
@@ -96,9 +96,6 @@ ENTRY(__start)
        R0 = RETX;
        [P0] = R0;
 
-       /* Let each Blackfin family do its own thing */
-       call _mach_early_start;
-
        /* Initialize stack pointer */
        sp.l = lo(INITIAL_STACK);
        sp.h = hi(INITIAL_STACK);