dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.

This patch adds the dts bindings documenation for the Altera SOCFPGA glue
layer for the Synopsys STMMAC ethernet driver.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: David S. Miller <davem@davemloft.net>
---
v3: Remove stray empty line at end of socfpga_cyclone5_socdk.dts
v2: Use the dwmac-sti as an example for a glue layer and split patch up
to have dts as a separate patch. Also cc dts maintainers since there is
a new binding.

diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
new file mode 100644 (file)
index 0000000..d53d376
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
@@ -0,0 +1,35 @@
+Altera SOCFPGA SoC DWMAC controller
+
+The device node has following properties.
+
+Required properties:
+ - compatible  : Should contain "altr,socfpga-stmmac"
+ - altr,sysmgr-syscon : Should be the phandle to the system manager node that
+   encompasses the glue register, and the register offset.
+
+Sub-nodes:
+The dwmac core should be added as subnode to SOCFPGA dwmac glue.
+- dwmac :      The binding details of dwmac can be found in
+  Documentation/devicetree/bindings/net/stmmac.txt
+
+Example:
+
+ethernet0: ethernet0 {
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       compatible = "altr,socfpga-stmmac";
+       altr,sysmgr-syscon = <&sysmgr 0x60>;
+       status = "disabled";
+       ranges;
+
+       gmac0: gmac0@ff700000 {
+               compatible = "snps,dwmac-3.70a", "snps,dwmac";
+               reg = <0xff700000 0x2000>;
+               interrupts = <0 115 4>;
+               interrupt-names = "macirq";
+               mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+               clocks = <&emac0_clk>;
+               clock-names = "stmmaceth";
+       };
+};

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 537f1a5c07f55538ca161a16f8d0594b6170ca62..3796141fb8bd364ba8b7c271cc06c41f6876db99 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -441,26 +441,43 @@
                                };
                        };
 
-               gmac0: ethernet@ff700000 {
-                       compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
-                       reg = <0xff700000 0x2000>;
-                       interrupts = <0 115 4>;
-                       interrupt-names = "macirq";
-                       mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
-                       clocks = <&emac0_clk>;
-                       clock-names = "stmmaceth";
+               ethernet0: ethernet0 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "altr,socfpga-stmmac";
+                       altr,sysmgr-syscon = <&sysmgr 0x60>;
                        status = "disabled";
+                       ranges;
+
+                       gmac0: gmac0@ff700000 {
+                               compatible = "snps,dwmac-3.70a", "snps,dwmac";
+                               reg = <0xff700000 0x2000>;
+                               interrupts = <0 115 4>;
+                               interrupt-names = "macirq";
+                               mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+                               clocks = <&emac0_clk>;
+                               clock-names = "stmmaceth";
+                       };
                };
 
-               gmac1: ethernet@ff702000 {
-                       compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
-                       reg = <0xff702000 0x2000>;
-                       interrupts = <0 120 4>;
-                       interrupt-names = "macirq";
-                       mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
-                       clocks = <&emac1_clk>;
-                       clock-names = "stmmaceth";
+               ethernet1: ethernet1 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "altr,socfpga-stmmac";
+                       altr,sysmgr-syscon = <&sysmgr 0x60>;
                        status = "disabled";
+                       ranges;
+
+                       gmac1: gmac1@ff702000 {
+                               device_type = "network";
+                               compatible = "snps,dwmac-3.70a", "snps,dwmac";
+                               reg = <0xff702000 0x2000>;
+                               interrupts = <0 120 4>;
+                               interrupt-names = "macirq";
+                               mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+                               clocks = <&emac1_clk>;
+                               clock-names = "stmmaceth";
+                       };
                };
 
                L2: l2-cache@fffef000 {

diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
index 5beffb2265f4869c0f38ca97385d35b0ebfb5555..2d6b38ba93701d92f0e22d61fb36f035fab2c4f2 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -37,4 +37,28 @@
                */
                ethernet0 = &gmac1;
        };
+
+       aliases {
+               /* this allow the ethaddr uboot environmnet variable contents
+                * to be added to the gmac1 device tree blob.
+                */
+               ethernet0 = &gmac1;
+       };
+};
+
+&ethernet1 {
+       status = "okay";
+};
+
+&gmac1 {
+       phy-mode = "rgmii";
+
+       rxd0-skew-ps = <0>;
+       rxd1-skew-ps = <0>;
+       rxd2-skew-ps = <0>;
+       rxd3-skew-ps = <0>;
+       txen-skew-ps = <0>;
+       txc-skew-ps = <2600>;
+       rxdv-skew-ps = <0>;
+       rxc-skew-ps = <2000>;
 };

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index 2ee52ab8cabbbb3613d03d3d832ccfd16ff21233..26c63a07f8b943639e8dff89fb7c4cc429f1befc 100644 (file)
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -38,3 +38,20 @@
                ethernet0 = &gmac1;
        };
 };
+
+&ethernet1 {
+       status = "okay";
+};
+
+&gmac1 {
+       phy-mode = "rgmii";
+
+       rxd0-skew-ps = <0>;
+       rxd1-skew-ps = <0>;
+       rxd2-skew-ps = <0>;
+       rxd3-skew-ps = <0>;
+       txen-skew-ps = <0>;
+       txc-skew-ps = <2600>;
+       rxdv-skew-ps = <0>;
+       rxc-skew-ps = <2000>;
+};

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
index 50b99a2c12aeb9549d70e09f9ea18c6bca797f1a..469bb5cac88661cf84b386b2346ee039850df37e 100644 (file)
--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
@@ -30,8 +30,28 @@
                device_type = "memory";
                reg = <0x0 0x40000000>; /* 1GB */
        };
+
+       aliases {
+               /* this allow the ethaddr uboot environmnet variable contents
+                * to be added to the gmac1 device tree blob.
+                */
+               ethernet0 = &gmac1;
+       };
 };
 
-&gmac1 {
+&ethernet1 {
        status = "okay";
 };
+
+&gmac1 {
+       phy-mode = "rgmii";
+
+       rxd0-skew-ps = <0>;
+       rxd1-skew-ps = <0>;
+       rxd2-skew-ps = <0>;
+       rxd3-skew-ps = <0>;
+       txen-skew-ps = <0>;
+       txc-skew-ps = <2600>;
+       rxdv-skew-ps = <0>;
+       rxc-skew-ps = <2000>;
+};

diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index d1ec0cab2dee0daa986a8ddd75f10222cbcd25bb..c01acce2e8a56c5afee7d91a5e8c247351554c1a 100644 (file)
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -75,3 +75,11 @@
                };
        };
 };
+
+&ethernet0 {
+        status = "okay";
+};
+
+&gmac0 {
+       phy-mode = "gmii";
+};