#include <linux/mfd/madera/registers.h>
struct madera_irq_priv {
- struct device *dev;
- int irq;
- struct regmap_irq_chip_data *irq_data;
- struct madera *madera;
+ struct device *dev;
+ int irq;
+ struct regmap_irq_chip_data *irq_data;
+ struct madera *madera;
};
+#define MADERA_IRQ(_irq, _reg) \
+ [MADERA_IRQ_ ## _irq] = { .reg_offset = (_reg) - MADERA_IRQ1_STATUS_2, \
+ .mask = MADERA_ ## _irq ## _EINT1 }
+
static const struct regmap_irq madera_irqs[MADERA_NUM_IRQ] = {
- [MADERA_IRQ_FLL1_LOCK] = { .reg_offset = 0,
- .mask = MADERA_FLL1_LOCK_EINT1 },
- [MADERA_IRQ_FLL2_LOCK] = { .reg_offset = 0,
- .mask = MADERA_FLL2_LOCK_EINT1 },
- [MADERA_IRQ_FLL3_LOCK] = { .reg_offset = 0,
- .mask = MADERA_FLL3_LOCK_EINT1 },
- [MADERA_IRQ_FLLAO_LOCK] = { .reg_offset = 0,
- .mask = MADERA_FLLAO_LOCK_EINT1 },
-
- [MADERA_IRQ_MICDET1] = { .reg_offset = 4,
- .mask = MADERA_MICDET1_EINT1 },
- [MADERA_IRQ_MICDET2] = { .reg_offset = 4,
- .mask = MADERA_MICDET2_EINT1 },
- [MADERA_IRQ_HPDET] = { .reg_offset = 4,
- .mask = MADERA_HPDET_EINT1 },
-
- [MADERA_IRQ_MICD_CLAMP_RISE] = { .reg_offset = 5,
- .mask = MADERA_MICD_CLAMP_RISE_EINT1 },
- [MADERA_IRQ_MICD_CLAMP_FALL] = { .reg_offset = 5,
- .mask = MADERA_MICD_CLAMP_FALL_EINT1 },
- [MADERA_IRQ_JD1_FALL] = { .reg_offset = 5,
- .mask = MADERA_JD1_FALL_EINT1 },
- [MADERA_IRQ_JD1_RISE] = { .reg_offset = 5,
- .mask = MADERA_JD1_RISE_EINT1 },
-
- [MADERA_IRQ_ASRC2_IN1_LOCK] = { .reg_offset = 7,
- .mask = MADERA_ASRC2_IN1_LOCK_EINT1 },
- [MADERA_IRQ_ASRC2_IN2_LOCK] = { .reg_offset = 7,
- .mask = MADERA_ASRC2_IN2_LOCK_EINT1 },
- [MADERA_IRQ_ASRC1_IN1_LOCK] = { .reg_offset = 7,
- .mask = MADERA_ASRC1_IN1_LOCK_EINT1 },
- [MADERA_IRQ_ASRC1_IN2_LOCK] = { .reg_offset = 7,
- .mask = MADERA_ASRC1_IN2_LOCK_EINT1 },
-
- [MADERA_IRQ_DRC2_SIG_DET] = { .reg_offset = 7,
- .mask = MADERA_DRC2_SIG_DET_EINT1 },
- [MADERA_IRQ_DRC1_SIG_DET] = { .reg_offset = 7,
- .mask = MADERA_DRC1_SIG_DET_EINT1 },
-
- [MADERA_IRQ_DSP_IRQ1] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ1_EINT1 },
- [MADERA_IRQ_DSP_IRQ2] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ2_EINT1 },
- [MADERA_IRQ_DSP_IRQ3] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ3_EINT1 },
- [MADERA_IRQ_DSP_IRQ4] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ4_EINT1 },
- [MADERA_IRQ_DSP_IRQ5] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ5_EINT1 },
- [MADERA_IRQ_DSP_IRQ6] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ6_EINT1 },
- [MADERA_IRQ_DSP_IRQ7] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ7_EINT1 },
- [MADERA_IRQ_DSP_IRQ8] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ8_EINT1 },
- [MADERA_IRQ_DSP_IRQ9] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ9_EINT1 },
- [MADERA_IRQ_DSP_IRQ10] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ10_EINT1 },
- [MADERA_IRQ_DSP_IRQ11] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ11_EINT1 },
- [MADERA_IRQ_DSP_IRQ12] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ12_EINT1 },
- [MADERA_IRQ_DSP_IRQ13] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ13_EINT1 },
- [MADERA_IRQ_DSP_IRQ14] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ14_EINT1 },
- [MADERA_IRQ_DSP_IRQ15] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ15_EINT1 },
- [MADERA_IRQ_DSP_IRQ16] = { .reg_offset = 9,
- .mask = MADERA_DSP_IRQ16_EINT1 },
-
- [MADERA_IRQ_HP3R_SC] = { .reg_offset = 10,
- .mask = MADERA_HP3R_SC_EINT1 },
- [MADERA_IRQ_HP3L_SC] = { .reg_offset = 10,
- .mask = MADERA_HP3L_SC_EINT1 },
- [MADERA_IRQ_HP2R_SC] = { .reg_offset = 10,
- .mask = MADERA_HP2R_SC_EINT1 },
- [MADERA_IRQ_HP2L_SC] = { .reg_offset = 10,
- .mask = MADERA_HP2L_SC_EINT1 },
- [MADERA_IRQ_HP1R_SC] = { .reg_offset = 10,
- .mask = MADERA_HP1R_SC_EINT1 },
- [MADERA_IRQ_HP1L_SC] = { .reg_offset = 10,
- .mask = MADERA_HP1L_SC_EINT1 },
-
- [MADERA_IRQ_SPK_OVERHEAT_WARN] = { .reg_offset = 13,
- .mask = MADERA_SPK_OVERHEAT_WARN_EINT1 },
- [MADERA_IRQ_SPK_OVERHEAT] = { .reg_offset = 13,
- .mask = MADERA_SPK_SHUTDOWN_EINT1 },
-
- [MADERA_IRQ_DSP1_BUS_ERROR] = { .reg_offset = 31,
- .mask = MADERA_ADSP_ERROR_STATUS_DSP1 },
- [MADERA_IRQ_DSP2_BUS_ERROR] = { .reg_offset = 31,
- .mask = MADERA_ADSP_ERROR_STATUS_DSP2 },
- [MADERA_IRQ_DSP3_BUS_ERROR] = { .reg_offset = 31,
- .mask = MADERA_ADSP_ERROR_STATUS_DSP3 },
- [MADERA_IRQ_DSP4_BUS_ERROR] = { .reg_offset = 31,
- .mask = MADERA_ADSP_ERROR_STATUS_DSP4 },
- [MADERA_IRQ_DSP5_BUS_ERROR] = { .reg_offset = 31,
- .mask = MADERA_ADSP_ERROR_STATUS_DSP5 },
- [MADERA_IRQ_DSP6_BUS_ERROR] = { .reg_offset = 31,
- .mask = MADERA_ADSP_ERROR_STATUS_DSP6 },
- [MADERA_IRQ_DSP7_BUS_ERROR] = { .reg_offset = 31,
- .mask = MADERA_ADSP_ERROR_STATUS_DSP7 },
+ MADERA_IRQ(FLL1_LOCK, MADERA_IRQ1_STATUS_2),
+ MADERA_IRQ(FLL2_LOCK, MADERA_IRQ1_STATUS_2),
+ MADERA_IRQ(FLL3_LOCK, MADERA_IRQ1_STATUS_2),
+ MADERA_IRQ(FLLAO_LOCK, MADERA_IRQ1_STATUS_2),
+
+ MADERA_IRQ(MICDET1, MADERA_IRQ1_STATUS_6),
+ MADERA_IRQ(MICDET2, MADERA_IRQ1_STATUS_6),
+ MADERA_IRQ(HPDET, MADERA_IRQ1_STATUS_6),
+
+ MADERA_IRQ(MICD_CLAMP_RISE, MADERA_IRQ1_STATUS_7),
+ MADERA_IRQ(MICD_CLAMP_FALL, MADERA_IRQ1_STATUS_7),
+ MADERA_IRQ(JD1_RISE, MADERA_IRQ1_STATUS_7),
+ MADERA_IRQ(JD1_FALL, MADERA_IRQ1_STATUS_7),
+
+ MADERA_IRQ(ASRC2_IN1_LOCK, MADERA_IRQ1_STATUS_9),
+ MADERA_IRQ(ASRC2_IN2_LOCK, MADERA_IRQ1_STATUS_9),
+ MADERA_IRQ(ASRC1_IN1_LOCK, MADERA_IRQ1_STATUS_9),
+ MADERA_IRQ(ASRC1_IN2_LOCK, MADERA_IRQ1_STATUS_9),
+ MADERA_IRQ(DRC2_SIG_DET, MADERA_IRQ1_STATUS_9),
+ MADERA_IRQ(DRC1_SIG_DET, MADERA_IRQ1_STATUS_9),
+
+ MADERA_IRQ(DSP_IRQ1, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ2, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ3, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ4, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ5, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ6, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ7, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ8, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ9, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ10, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ11, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ12, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ13, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ14, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ15, MADERA_IRQ1_STATUS_11),
+ MADERA_IRQ(DSP_IRQ16, MADERA_IRQ1_STATUS_11),
+
+ MADERA_IRQ(HP3R_SC, MADERA_IRQ1_STATUS_12),
+ MADERA_IRQ(HP3L_SC, MADERA_IRQ1_STATUS_12),
+ MADERA_IRQ(HP2R_SC, MADERA_IRQ1_STATUS_12),
+ MADERA_IRQ(HP2L_SC, MADERA_IRQ1_STATUS_12),
+ MADERA_IRQ(HP1R_SC, MADERA_IRQ1_STATUS_12),
+ MADERA_IRQ(HP1L_SC, MADERA_IRQ1_STATUS_12),
+
+ MADERA_IRQ(SPK_OVERHEAT_WARN, MADERA_IRQ1_STATUS_15),
+ MADERA_IRQ(SPK_OVERHEAT, MADERA_IRQ1_STATUS_15),
+
+ MADERA_IRQ(DSP1_BUS_ERR, MADERA_IRQ1_STATUS_33),
+ MADERA_IRQ(DSP2_BUS_ERR, MADERA_IRQ1_STATUS_33),
+ MADERA_IRQ(DSP3_BUS_ERR, MADERA_IRQ1_STATUS_33),
+ MADERA_IRQ(DSP4_BUS_ERR, MADERA_IRQ1_STATUS_33),
+ MADERA_IRQ(DSP5_BUS_ERR, MADERA_IRQ1_STATUS_33),
+ MADERA_IRQ(DSP6_BUS_ERR, MADERA_IRQ1_STATUS_33),
+ MADERA_IRQ(DSP7_BUS_ERR, MADERA_IRQ1_STATUS_33),
};
static const struct regmap_irq_chip madera_irq = {
- .name = "madera IRQ",
- .status_base = MADERA_IRQ1_STATUS_2,
- .mask_base = MADERA_IRQ1_MASK_2,
- .ack_base = MADERA_IRQ1_STATUS_2,
- .runtime_pm = true, /* codec must be resumed to read IRQ status */
- .num_regs = 32,
- .irqs = madera_irqs,
- .num_irqs = ARRAY_SIZE(madera_irqs),
+ .name = "madera IRQ",
+ .status_base = MADERA_IRQ1_STATUS_2,
+ .mask_base = MADERA_IRQ1_MASK_2,
+ .ack_base = MADERA_IRQ1_STATUS_2,
+ .runtime_pm = true,
+ .num_regs = 32,
+ .irqs = madera_irqs,
+ .num_irqs = ARRAY_SIZE(madera_irqs),
};
static int madera_map_irq(struct madera *madera, int irq)
{
struct madera_irq_priv *priv = dev_get_drvdata(madera->irq_dev);
- if (irq < 0)
- return irq;
-
if (!madera->irq_dev)
return -ENOENT;
}
irq_flags = irqd_get_trigger_type(irq_data);
+
+ /* Codec defaults to trigger low, use this if no flags given */
if (irq_flags == IRQ_TYPE_NONE)
- irq_flags = IRQF_TRIGGER_LOW; /* Device default */
+ irq_flags = IRQF_TRIGGER_LOW;
}
if (irq_flags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
- dev_err(priv->dev,
- "Host interrupt not level-triggered\n");
+ dev_err(priv->dev, "Host interrupt not level-triggered\n");
return -EINVAL;
}
}
static struct platform_driver madera_irq_driver = {
- .probe = madera_irq_probe,
+ .probe = madera_irq_probe,
.remove = madera_irq_remove,
.driver = {
.name = "madera-irq",
- .pm = &madera_irq_pm_ops,
+ .pm = &madera_irq_pm_ops,
}
};
-
module_platform_driver(madera_irq_driver);
MODULE_DESCRIPTION("Madera IRQ driver");
#define MADERA_SPK_SHUTDOWN_EINT1_WIDTH 1
/* (0x1820) - IRQ1 Status 33 */
-#define MADERA_ADSP_ERROR_STATUS_DSP7 0x0040
-#define MADERA_ADSP_ERROR_STATUS_DSP7_MASK 0x0040
-#define MADERA_ADSP_ERROR_STATUS_DSP7_SHIFT 6
-#define MADERA_ADSP_ERROR_STATUS_DSP7_WIDTH 1
-#define MADERA_ADSP_ERROR_STATUS_DSP6 0x0020
-#define MADERA_ADSP_ERROR_STATUS_DSP6_MASK 0x0020
-#define MADERA_ADSP_ERROR_STATUS_DSP6_SHIFT 5
-#define MADERA_ADSP_ERROR_STATUS_DSP6_WIDTH 1
-#define MADERA_ADSP_ERROR_STATUS_DSP5 0x0010
-#define MADERA_ADSP_ERROR_STATUS_DSP5_MASK 0x0010
-#define MADERA_ADSP_ERROR_STATUS_DSP5_SHIFT 4
-#define MADERA_ADSP_ERROR_STATUS_DSP5_WIDTH 1
-#define MADERA_ADSP_ERROR_STATUS_DSP4 0x0008
-#define MADERA_ADSP_ERROR_STATUS_DSP4_MASK 0x0008
-#define MADERA_ADSP_ERROR_STATUS_DSP4_SHIFT 3
-#define MADERA_ADSP_ERROR_STATUS_DSP4_WIDTH 1
-#define MADERA_ADSP_ERROR_STATUS_DSP3 0x0004
-#define MADERA_ADSP_ERROR_STATUS_DSP3_MASK 0x0004
-#define MADERA_ADSP_ERROR_STATUS_DSP3_SHIFT 2
-#define MADERA_ADSP_ERROR_STATUS_DSP3_WIDTH 1
-#define MADERA_ADSP_ERROR_STATUS_DSP2 0x0002
-#define MADERA_ADSP_ERROR_STATUS_DSP2_MASK 0x0002
-#define MADERA_ADSP_ERROR_STATUS_DSP2_SHIFT 1
-#define MADERA_ADSP_ERROR_STATUS_DSP2_WIDTH 1
-#define MADERA_ADSP_ERROR_STATUS_DSP1 0x0001
-#define MADERA_ADSP_ERROR_STATUS_DSP1_MASK 0x0001
-#define MADERA_ADSP_ERROR_STATUS_DSP1_SHIFT 0
-#define MADERA_ADSP_ERROR_STATUS_DSP1_WIDTH 1
+#define MADERA_DSP7_BUS_ERR_EINT1 0x0040
+#define MADERA_DSP7_BUS_ERR_EINT1_MASK 0x0040
+#define MADERA_DSP7_BUS_ERR_EINT1_SHIFT 6
+#define MADERA_DSP7_BUS_ERR_EINT1_WIDTH 1
+#define MADERA_DSP6_BUS_ERR_EINT1 0x0020
+#define MADERA_DSP6_BUS_ERR_EINT1_MASK 0x0020
+#define MADERA_DSP6_BUS_ERR_EINT1_SHIFT 5
+#define MADERA_DSP6_BUS_ERR_EINT1_WIDTH 1
+#define MADERA_DSP5_BUS_ERR_EINT1 0x0010
+#define MADERA_DSP5_BUS_ERR_EINT1_MASK 0x0010
+#define MADERA_DSP5_BUS_ERR_EINT1_SHIFT 4
+#define MADERA_DSP5_BUS_ERR_EINT1_WIDTH 1
+#define MADERA_DSP4_BUS_ERR_EINT1 0x0008
+#define MADERA_DSP4_BUS_ERR_EINT1_MASK 0x0008
+#define MADERA_DSP4_BUS_ERR_EINT1_SHIFT 3
+#define MADERA_DSP4_BUS_ERR_EINT1_WIDTH 1
+#define MADERA_DSP3_BUS_ERR_EINT1 0x0004
+#define MADERA_DSP3_BUS_ERR_EINT13_MASK 0x0004
+#define MADERA_DSP3_BUS_ERR_EINT1_SHIFT 2
+#define MADERA_DSP3_BUS_ERR_EINT1_WIDTH 1
+#define MADERA_DSP2_BUS_ERR_EINT1 0x0002
+#define MADERA_DSP2_BUS_ERR_EINT1_MASK 0x0002
+#define MADERA_DSP2_BUS_ERR_EINT1_SHIFT 1
+#define MADERA_DSP2_BUS_ERR_EINT1_WIDTH 1
+#define MADERA_DSP1_BUS_ERR_EINT1 0x0001
+#define MADERA_DSP1_BUS_ERR_EINT1_MASK 0x0001
+#define MADERA_DSP1_BUS_ERR_EINT1_SHIFT 0
+#define MADERA_DSP1_BUS_ERR_EINT1_WIDTH 1
/* (0x1840) IRQ1_Mask_1 */
#define MADERA_IM_DSP_SHARED_WR_COLL_EINT1 0x8000