drm/nouveau/mc: port to subdev interfaces
authorBen Skeggs <bskeggs@redhat.com>
Wed, 11 Jul 2012 05:58:56 +0000 (15:58 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 3 Oct 2012 03:12:47 +0000 (13:12 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
23 files changed:
drivers/gpu/drm/nouveau/Makefile
drivers/gpu/drm/nouveau/core/include/subdev/mc.h [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/device/nv04.c
drivers/gpu/drm/nouveau/core/subdev/device/nv10.c
drivers/gpu/drm/nouveau/core/subdev/device/nv20.c
drivers/gpu/drm/nouveau/core/subdev/device/nv30.c
drivers/gpu/drm/nouveau/core/subdev/device/nv40.c
drivers/gpu/drm/nouveau/core/subdev/device/nv50.c
drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c
drivers/gpu/drm/nouveau/core/subdev/device/nve0.c
drivers/gpu/drm/nouveau/core/subdev/mc/base.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/mc/nv04.c
drivers/gpu/drm/nouveau/core/subdev/mc/nv40.c [deleted file]
drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c
drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nouveau_compat.c
drivers/gpu/drm/nouveau/nouveau_compat.h
drivers/gpu/drm/nouveau/nouveau_drv.c
drivers/gpu/drm/nouveau/nouveau_drv.h
drivers/gpu/drm/nouveau/nouveau_irq.c
drivers/gpu/drm/nouveau/nouveau_state.c

index 522bc1c1e4d041285fdc179bbee42d0af29020d2..3ce81e5244a0aec78c9a727969a39f22747ef943 100644 (file)
@@ -69,9 +69,12 @@ nouveau-y += core/subdev/i2c/bit.o
 nouveau-y += core/subdev/instmem/nv04.o
 nouveau-y += core/subdev/instmem/nv50.o
 nouveau-y += core/subdev/instmem/nvc0.o
+nouveau-y += core/subdev/mc/base.o
 nouveau-y += core/subdev/mc/nv04.o
-nouveau-y += core/subdev/mc/nv40.o
+nouveau-y += core/subdev/mc/nv44.o
 nouveau-y += core/subdev/mc/nv50.o
+nouveau-y += core/subdev/mc/nv98.o
+nouveau-y += core/subdev/mc/nvc0.o
 nouveau-y += core/subdev/timer/nv04.o
 nouveau-y += core/subdev/vm/base.o
 nouveau-y += core/subdev/vm/nv50.o
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/mc.h b/drivers/gpu/drm/nouveau/core/include/subdev/mc.h
new file mode 100644 (file)
index 0000000..fded97c
--- /dev/null
@@ -0,0 +1,49 @@
+#ifndef __NOUVEAU_MC_H__
+#define __NOUVEAU_MC_H__
+
+#include <core/subdev.h>
+#include <core/device.h>
+
+struct nouveau_mc_intr {
+       u32 stat;
+       u32 unit;
+};
+
+struct nouveau_mc {
+       struct nouveau_subdev base;
+       const struct nouveau_mc_intr *intr_map;
+};
+
+static inline struct nouveau_mc *
+nouveau_mc(void *obj)
+{
+       return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_MC];
+}
+
+#define nouveau_mc_create(p,e,o,d)                                             \
+       nouveau_subdev_create_((p), (e), (o), 0, "PMC", "master",              \
+                              sizeof(**d), (void **)d)
+#define nouveau_mc_destroy(p)                                                  \
+       nouveau_subdev_destroy(&(p)->base)
+#define nouveau_mc_init(p)                                                     \
+       nouveau_subdev_init(&(p)->base)
+#define nouveau_mc_fini(p,s)                                                   \
+       nouveau_subdev_fini(&(p)->base, (s))
+
+#define _nouveau_mc_dtor _nouveau_subdev_dtor
+#define _nouveau_mc_init _nouveau_subdev_init
+#define _nouveau_mc_fini _nouveau_subdev_fini
+
+extern struct nouveau_oclass nv04_mc_oclass;
+extern struct nouveau_oclass nv44_mc_oclass;
+extern struct nouveau_oclass nv50_mc_oclass;
+extern struct nouveau_oclass nv98_mc_oclass;
+extern struct nouveau_oclass nvc0_mc_oclass;
+
+void nouveau_mc_intr(struct nouveau_subdev *);
+
+extern const struct nouveau_mc_intr nv04_mc_intr[];
+int nv04_mc_init(struct nouveau_object *);
+int nv50_mc_init(struct nouveau_object *);
+
+#endif
index 47f7841ecaab9a441226cfcee8b1523e01aa22d6..c3820a8e93e96db61c86a7a1ea45f4dee7dccacf 100644 (file)
@@ -27,6 +27,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nv04_identify(struct nouveau_device *device)
@@ -37,12 +38,14 @@ nv04_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv04_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x05:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv05_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown RIVA chipset\n");
index ad481ebe7eae760a51f73f8c96ffcd40b6dc3fb0..94686f43118d1e726409b14d87dc7dc31736babd 100644 (file)
@@ -28,6 +28,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nv10_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x15:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x16:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -53,6 +56,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x1a:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -60,6 +64,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x11:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -67,6 +72,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x17:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -74,6 +80,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x1f:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -81,6 +88,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x18:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -88,6 +96,7 @@ nv10_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown Celsius chipset\n");
index 51ef1f4b9a5ff0884ea9c97d286ae3e1e59e43d0..d14041eb5637ee0b7b374e0929ed869ebf290d78 100644 (file)
@@ -28,6 +28,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nv20_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x25:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x28:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -53,6 +56,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x2a:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -60,6 +64,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown Kelvin chipset\n");
index e812f71a931cedb4ec0458f373a727312cda3ca3..a04a20d46728cc8bf525b66974202d0141c8879e 100644 (file)
@@ -28,6 +28,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nv30_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x35:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x31:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -53,6 +56,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x36:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -60,6 +64,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x34:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -67,6 +72,7 @@ nv30_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv04_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv10_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown Rankine chipset\n");
index 8d2b62cbdffd2dbf8f0d5ba1a7d0196967758943..a8cc40898c6431f116426d7066aaa693639a5a1e 100644 (file)
@@ -28,6 +28,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nv40_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x41:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x42:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -53,6 +56,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x43:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -60,6 +64,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x45:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -67,6 +72,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x47:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -74,6 +80,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x49:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -81,6 +88,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x4b:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -88,6 +96,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                break;
        case 0x44:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -95,6 +104,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        case 0x46:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -102,6 +112,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        case 0x4a:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -109,6 +120,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        case 0x4c:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -116,6 +128,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        case 0x4e:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -123,6 +136,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        case 0x63:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -130,6 +144,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        case 0x67:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -137,6 +152,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        case 0x68:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -144,6 +160,7 @@ nv40_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv1a_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv44_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown Curie chipset\n");
index cb50d8629bbb90a5c48a5eb1c5dad3ac41941948..eb5dfba7c74fb8eec7ac4aafc65ce5509206de70 100644 (file)
@@ -28,6 +28,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nv50_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
                break;
        case 0x84:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
                break;
        case 0x86:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -53,6 +56,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
                break;
        case 0x92:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -60,6 +64,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
                break;
        case 0x94:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -67,6 +72,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
                break;
        case 0x96:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -74,6 +80,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv50_mc_oclass;
                break;
        case 0x98:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -81,6 +88,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        case 0xa0:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -88,6 +96,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        case 0xaa:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -95,6 +104,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        case 0xac:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -102,6 +112,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv50_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        case 0xa3:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -109,6 +120,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        case 0xa5:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -116,6 +128,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        case 0xa8:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -123,6 +136,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        case 0xaf:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -130,6 +144,7 @@ nv50_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nva3_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nv98_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown Tesla chipset\n");
index 67c46fc15b8f89066fc132c068d32da082fd3d0e..5efb4aa7ebcba1166530c47ac4806627f95aed3a 100644 (file)
@@ -28,6 +28,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nvc0_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xc4:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xc3:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -53,6 +56,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xce:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -60,6 +64,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xcf:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -67,6 +72,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xc1:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -74,6 +80,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xc8:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -81,6 +88,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xd9:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -88,6 +96,7 @@ nvc0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown Fermi chipset\n");
index a1e87dfccf6c7706461b8a1e949e2834e09a731b..eb6ccba9fca28df43fdd71f33987e4bae63b6d04 100644 (file)
@@ -28,6 +28,7 @@
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
 #include <subdev/devinit.h>
+#include <subdev/mc.h>
 
 int
 nve0_identify(struct nouveau_device *device)
@@ -39,6 +40,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        case 0xe7:
                device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;
@@ -46,6 +48,7 @@ nve0_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_I2C    ] = &nouveau_i2c_oclass;
                device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nvc0_clock_oclass;
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
+               device->oclass[NVDEV_SUBDEV_MC     ] = &nvc0_mc_oclass;
                break;
        default:
                nv_fatal(device, "unknown Kepler chipset\n");
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/base.c b/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
new file mode 100644 (file)
index 0000000..de5721c
--- /dev/null
@@ -0,0 +1,49 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <subdev/mc.h>
+
+void
+nouveau_mc_intr(struct nouveau_subdev *subdev)
+{
+       struct nouveau_mc *pmc = nouveau_mc(subdev);
+       const struct nouveau_mc_intr *map = pmc->intr_map;
+       struct nouveau_subdev *unit;
+       u32 stat;
+
+       stat = nv_rd32(pmc, 0x000100);
+       while (stat && map->stat) {
+               if (stat & map->stat) {
+                       unit = nouveau_subdev(subdev, map->unit);
+                       if (unit && unit->intr)
+                               unit->intr(unit);
+                       stat &= ~map->stat;
+               }
+               map++;
+       }
+
+       if (stat) {
+               nv_error(pmc, "unknown intr 0x%08x\n", stat);
+       }
+}
index 60b146e4c53db02d03337a44c0854848dc3d8b57..23ebe477a6f0c0f40cf3f7e2af4662b0dd286c85 100644 (file)
@@ -1,24 +1,83 @@
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include <nouveau_drm.h>
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
 
-int
-nv04_mc_init(struct drm_device *dev)
-{
-       /* Power up everything, resetting each individual unit will
-        * be done later if needed.
-        */
+#include <subdev/mc.h>
+
+struct nv04_mc_priv {
+       struct nouveau_mc base;
+};
 
-       nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
+const struct nouveau_mc_intr
+nv04_mc_intr[] = {
+       { 0x00000001, NVDEV_ENGINE_MPEG },      /* NV17- MPEG/ME */
+       { 0x00000100, NVDEV_ENGINE_FIFO },
+       { 0x00001000, NVDEV_ENGINE_GR },
+       { 0x00020000, NVDEV_ENGINE_VP },        /* NV40- */
+       { 0x00100000, NVDEV_SUBDEV_TIMER },
+       { 0x01000000, NVDEV_ENGINE_DISP },      /* NV04- PCRTC0 */
+       { 0x02000000, NVDEV_ENGINE_DISP },      /* NV11- PCRTC1 */
+       { 0x10000000, NVDEV_SUBDEV_GPIO },      /* PBUS */
+       { 0x80000000, NVDEV_ENGINE_SW },
+       {}
+};
+
+static int
+nv04_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+            struct nouveau_oclass *oclass, void *data, u32 size,
+            struct nouveau_object **pobject)
+{
+       struct nv04_mc_priv *priv;
+       int ret;
 
-       /* Disable PROM access. */
-       nv_wr32(dev, NV_PBUS_PCI_NV_20, NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED);
+       ret = nouveau_mc_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
 
+       nv_subdev(priv)->intr = nouveau_mc_intr;
+       priv->base.intr_map = nv04_mc_intr;
        return 0;
 }
 
-void
-nv04_mc_takedown(struct drm_device *dev)
+int
+nv04_mc_init(struct nouveau_object *object)
 {
+       struct nv04_mc_priv *priv = (void *)object;
+
+       nv_wr32(priv, 0x000200, 0xffffffff); /* everything enabled */
+       nv_wr32(priv, 0x001850, 0x00000001); /* disable rom access */
+
+       return nouveau_mc_init(&priv->base);
 }
+
+struct nouveau_oclass
+nv04_mc_oclass = {
+       .handle = NV_SUBDEV(MC, 0x04),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv04_mc_ctor,
+               .dtor = _nouveau_mc_dtor,
+               .init = nv04_mc_init,
+               .fini = _nouveau_mc_fini,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nv40.c b/drivers/gpu/drm/nouveau/core/subdev/mc/nv40.c
deleted file mode 100644 (file)
index 74cfa03..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
-#include <nouveau_drm.h>
-
-int
-nv40_mc_init(struct drm_device *dev)
-{
-       /* Power up everything, resetting each individual unit will
-        * be done later if needed.
-        */
-       nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
-
-       if (nv44_graph_class(dev)) {
-               u32 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA);
-               nv_wr32(dev, NV40_PMC_1700, tmp);
-               nv_wr32(dev, NV40_PMC_1704, 0);
-               nv_wr32(dev, NV40_PMC_1708, 0);
-               nv_wr32(dev, NV40_PMC_170C, tmp);
-       }
-
-       return 0;
-}
-
-void
-nv40_mc_takedown(struct drm_device *dev)
-{
-}
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c b/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c
new file mode 100644 (file)
index 0000000..397d868
--- /dev/null
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <subdev/mc.h>
+
+struct nv44_mc_priv {
+       struct nouveau_mc base;
+};
+
+static int
+nv44_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+            struct nouveau_oclass *oclass, void *data, u32 size,
+            struct nouveau_object **pobject)
+{
+       struct nv44_mc_priv *priv;
+       int ret;
+
+       ret = nouveau_mc_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->intr = nouveau_mc_intr;
+       priv->base.intr_map = nv04_mc_intr;
+       return 0;
+}
+
+static int
+nv44_mc_init(struct nouveau_object *object)
+{
+       struct nv44_mc_priv *priv = (void *)object;
+       u32 tmp = nv_rd32(priv, 0x10020c);
+
+       nv_wr32(priv, 0x000200, 0xffffffff); /* everything enabled */
+
+       nv_wr32(priv, 0x001700, tmp);
+       nv_wr32(priv, 0x001704, 0);
+       nv_wr32(priv, 0x001708, 0);
+       nv_wr32(priv, 0x00170c, tmp);
+
+       return nouveau_mc_init(&priv->base);
+}
+
+struct nouveau_oclass
+nv44_mc_oclass = {
+       .handle = NV_SUBDEV(MC, 0x44),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv44_mc_ctor,
+               .dtor = _nouveau_mc_dtor,
+               .init = nv44_mc_init,
+               .fini = _nouveau_mc_fini,
+       },
+};
index e0a9c3faa202f71fe8d4b6e41cc8c8d0d7c685ce..cedf33b02977db1139f89346155af16a91c18577 100644 (file)
@@ -1,40 +1,80 @@
 /*
- * Copyright (C) 2007 Ben Skeggs.
- * All Rights Reserved.
+ * Copyright 2012 Red Hat Inc.
  *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sublicense, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
  *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
  *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
  *
+ * Authors: Ben Skeggs
  */
 
-#include "drmP.h"
-#include "drm.h"
-#include "nouveau_drv.h"
+#include <subdev/mc.h>
 
-int
-nv50_mc_init(struct drm_device *dev)
+struct nv50_mc_priv {
+       struct nouveau_mc base;
+};
+
+static const struct nouveau_mc_intr
+nv50_mc_intr[] = {
+       { 0x00000001, NVDEV_ENGINE_MPEG },
+       { 0x00000100, NVDEV_ENGINE_FIFO },
+       { 0x00001000, NVDEV_ENGINE_GR },
+       { 0x00004000, NVDEV_ENGINE_CRYPT },     /* NV84- */
+       { 0x00008000, NVDEV_ENGINE_BSP },       /* NV84- */
+       { 0x00100000, NVDEV_SUBDEV_TIMER },
+       { 0x00200000, NVDEV_SUBDEV_GPIO },
+       { 0x04000000, NVDEV_ENGINE_DISP },
+       { 0x80000000, NVDEV_ENGINE_SW },
+       {},
+};
+
+static int
+nv50_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+            struct nouveau_oclass *oclass, void *data, u32 size,
+            struct nouveau_object **pobject)
 {
-       nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF);
+       struct nv50_mc_priv *priv;
+       int ret;
+
+       ret = nouveau_mc_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->intr = nouveau_mc_intr;
+       priv->base.intr_map = nv50_mc_intr;
        return 0;
 }
 
-void nv50_mc_takedown(struct drm_device *dev)
+int
+nv50_mc_init(struct nouveau_object *object)
 {
+       struct nv50_mc_priv *priv = (void *)object;
+       nv_wr32(priv, 0x000200, 0xffffffff); /* everything on */
+       return nouveau_mc_init(&priv->base);
 }
+
+struct nouveau_oclass
+nv50_mc_oclass = {
+       .handle = NV_SUBDEV(MC, 0x50),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv50_mc_ctor,
+               .dtor = _nouveau_mc_dtor,
+               .init = nv50_mc_init,
+               .fini = _nouveau_mc_fini,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c b/drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c
new file mode 100644 (file)
index 0000000..a001e4c
--- /dev/null
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <subdev/mc.h>
+
+struct nv98_mc_priv {
+       struct nouveau_mc base;
+};
+
+static const struct nouveau_mc_intr
+nv98_mc_intr[] = {
+       { 0x00000001, NVDEV_ENGINE_PPP },
+       { 0x00000100, NVDEV_ENGINE_FIFO },
+       { 0x00001000, NVDEV_ENGINE_GR },
+       { 0x00004000, NVDEV_ENGINE_CRYPT },     /* NV84:NVA3 */
+       { 0x00008000, NVDEV_ENGINE_BSP },
+       { 0x00100000, NVDEV_SUBDEV_TIMER },
+       { 0x00200000, NVDEV_SUBDEV_GPIO },
+       { 0x00400000, NVDEV_ENGINE_COPY0 },     /* NVA3-     */
+       { 0x04000000, NVDEV_ENGINE_DISP },
+       { 0x80000000, NVDEV_ENGINE_SW },
+       {},
+};
+
+static int
+nv98_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+            struct nouveau_oclass *oclass, void *data, u32 size,
+            struct nouveau_object **pobject)
+{
+       struct nv98_mc_priv *priv;
+       int ret;
+
+       ret = nouveau_mc_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->intr = nouveau_mc_intr;
+       priv->base.intr_map = nv98_mc_intr;
+       return 0;
+}
+
+struct nouveau_oclass
+nv98_mc_oclass = {
+       .handle = NV_SUBDEV(MC, 0x98),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv98_mc_ctor,
+               .dtor = _nouveau_mc_dtor,
+               .init = nv50_mc_init,
+               .fini = _nouveau_mc_fini,
+       },
+};
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c
new file mode 100644 (file)
index 0000000..3fa39bb
--- /dev/null
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#include <subdev/mc.h>
+
+struct nvc0_mc_priv {
+       struct nouveau_mc base;
+};
+
+static const struct nouveau_mc_intr
+nvc0_mc_intr[] = {
+       { 0x00000001, NVDEV_ENGINE_PPP },
+       { 0x00000020, NVDEV_ENGINE_COPY0 },
+       { 0x00000040, NVDEV_ENGINE_COPY1 },
+       { 0x00000100, NVDEV_ENGINE_FIFO },
+       { 0x00001000, NVDEV_ENGINE_GR },
+       { 0x00008000, NVDEV_ENGINE_BSP },
+       { 0x00100000, NVDEV_SUBDEV_TIMER },
+       { 0x00200000, NVDEV_SUBDEV_GPIO },
+       { 0x04000000, NVDEV_ENGINE_DISP },
+       { 0x80000000, NVDEV_ENGINE_SW },
+       {},
+};
+
+static int
+nvc0_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+            struct nouveau_oclass *oclass, void *data, u32 size,
+            struct nouveau_object **pobject)
+{
+       struct nvc0_mc_priv *priv;
+       int ret;
+
+       ret = nouveau_mc_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       nv_subdev(priv)->intr = nouveau_mc_intr;
+       priv->base.intr_map = nvc0_mc_intr;
+       return 0;
+}
+
+struct nouveau_oclass
+nvc0_mc_oclass = {
+       .handle = NV_SUBDEV(MC, 0xc0),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nvc0_mc_ctor,
+               .dtor = _nouveau_mc_dtor,
+               .init = nv50_mc_init,
+               .fini = _nouveau_mc_fini,
+       },
+};
index 3fc7d5785c6fcf338f1fb373c22267a1a5775c87..cfdc45c86e12b91204ce3f952c0c3c073f92366a 100644 (file)
@@ -8,6 +8,7 @@
 #include <subdev/gpio.h>
 #include <subdev/i2c.h>
 #include <subdev/clock.h>
+#include <subdev/mc.h>
 
 void *nouveau_newpriv(struct drm_device *);
 
@@ -293,3 +294,11 @@ nouveau_bios_init_exec(struct drm_device *dev, uint16_t table)
 {
        nouveau_bios_run_init_table(dev, table, NULL, 0);
 }
+
+void
+nv_intr(struct drm_device *dev)
+{
+       struct nouveau_drm *drm = nouveau_newpriv(dev);
+       struct nouveau_mc *pmc = nouveau_mc(drm->device);
+       nv_subdev(pmc)->intr(pmc);
+}
index 7ffad0a7a30143902eab9c58eee9ca58a08fdc15..19995cdc8bb0393a25f5284436466f454f59eecd 100644 (file)
@@ -51,4 +51,6 @@ struct dcb_output;
 void nouveau_bios_run_init_table(struct drm_device *, u16, struct dcb_output *, int);
 void nouveau_bios_init_exec(struct drm_device *, u16);
 
+void nv_intr(struct drm_device *);
+
 #endif
index 25487c148e4abc11c106ead4280338555a3e28e1..d1251d8772e84c84aa0cdcf9f0853b9724aacf85 100644 (file)
@@ -252,7 +252,6 @@ nouveau_pci_resume(struct pci_dev *pdev)
 
        NV_INFO(dev, "Reinitialising engines...\n");
        engine->instmem.resume(dev);
-       engine->mc.init(dev);
        engine->timer.init(dev);
        engine->fb.init(dev);
        for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
index f6be94d323f03b9ad40da1a2773e376c191b94b2..7722b03d8d354a88e1bcb27672b0f0171208129a 100644 (file)
@@ -324,11 +324,6 @@ struct nouveau_instmem_engine {
        void    (*flush)(struct drm_device *);
 };
 
-struct nouveau_mc_engine {
-       int  (*init)(struct drm_device *dev);
-       void (*takedown)(struct drm_device *dev);
-};
-
 struct nouveau_timer_engine {
        int      (*init)(struct drm_device *dev);
        void     (*takedown)(struct drm_device *dev);
@@ -544,7 +539,6 @@ struct nouveau_vram_engine {
 
 struct nouveau_engine {
        struct nouveau_instmem_engine instmem;
-       struct nouveau_mc_engine      mc;
        struct nouveau_timer_engine   timer;
        struct nouveau_fb_engine      fb;
        struct nouveau_display_engine display;
@@ -1210,18 +1204,6 @@ extern void nvc0_instmem_takedown(struct drm_device *);
 extern int  nvc0_instmem_suspend(struct drm_device *);
 extern void nvc0_instmem_resume(struct drm_device *);
 
-/* nv04_mc.c */
-extern int  nv04_mc_init(struct drm_device *);
-extern void nv04_mc_takedown(struct drm_device *);
-
-/* nv40_mc.c */
-extern int  nv40_mc_init(struct drm_device *);
-extern void nv40_mc_takedown(struct drm_device *);
-
-/* nv50_mc.c */
-extern int  nv50_mc_init(struct drm_device *);
-extern void nv50_mc_takedown(struct drm_device *);
-
 /* nv04_timer.c */
 extern int  nv04_timer_init(struct drm_device *);
 extern uint64_t nv04_timer_read(struct drm_device *);
index d36be7a51079571f33487bf5516322b3200a6c94..1a75a96cef260b8a44f3577120e2ec289b3ae9db 100644 (file)
@@ -87,12 +87,12 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
                stat &= ~(1 << i);
        }
 
+       nv_intr(dev);
+
        if (dev_priv->msi_enabled)
                nv_wr08(dev, 0x00088068, 0xff);
        spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
 
-       if (stat && nouveau_ratelimit())
-               NV_ERROR(dev, "PMC - unhandled INTR 0x%08x\n", stat);
        return IRQ_HANDLED;
 }
 
index 1a07655d1e9cbe50b4410dd08a5acddaffc76179..e487747d70d8a0f39cb73b1d169e7c915f7573e2 100644 (file)
@@ -61,8 +61,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv04_instmem_map;
                engine->instmem.unmap           = nv04_instmem_unmap;
                engine->instmem.flush           = nv04_instmem_flush;
-               engine->mc.init                 = nv04_mc_init;
-               engine->mc.takedown             = nv04_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -91,8 +89,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv04_instmem_map;
                engine->instmem.unmap           = nv04_instmem_unmap;
                engine->instmem.flush           = nv04_instmem_flush;
-               engine->mc.init                 = nv04_mc_init;
-               engine->mc.takedown             = nv04_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -128,8 +124,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv04_instmem_map;
                engine->instmem.unmap           = nv04_instmem_unmap;
                engine->instmem.flush           = nv04_instmem_flush;
-               engine->mc.init                 = nv04_mc_init;
-               engine->mc.takedown             = nv04_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -161,8 +155,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv04_instmem_map;
                engine->instmem.unmap           = nv04_instmem_unmap;
                engine->instmem.flush           = nv04_instmem_flush;
-               engine->mc.init                 = nv04_mc_init;
-               engine->mc.takedown             = nv04_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -197,8 +189,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv04_instmem_map;
                engine->instmem.unmap           = nv04_instmem_unmap;
                engine->instmem.flush           = nv04_instmem_flush;
-               engine->mc.init                 = nv40_mc_init;
-               engine->mc.takedown             = nv40_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -241,8 +231,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                        engine->instmem.flush   = nv50_instmem_flush;
                else
                        engine->instmem.flush   = nv84_instmem_flush;
-               engine->mc.init                 = nv50_mc_init;
-               engine->mc.takedown             = nv50_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -299,8 +287,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv50_instmem_map;
                engine->instmem.unmap           = nv50_instmem_unmap;
                engine->instmem.flush           = nv84_instmem_flush;
-               engine->mc.init                 = nv50_mc_init;
-               engine->mc.takedown             = nv50_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -336,8 +322,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv50_instmem_map;
                engine->instmem.unmap           = nv50_instmem_unmap;
                engine->instmem.flush           = nv84_instmem_flush;
-               engine->mc.init                 = nv50_mc_init;
-               engine->mc.takedown             = nv50_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -371,8 +355,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->instmem.map             = nv50_instmem_map;
                engine->instmem.unmap           = nv50_instmem_unmap;
                engine->instmem.flush           = nv84_instmem_flush;
-               engine->mc.init                 = nv50_mc_init;
-               engine->mc.takedown             = nv50_mc_takedown;
                engine->timer.init              = nv04_timer_init;
                engine->timer.read              = nv04_timer_read;
                engine->timer.takedown          = nv04_timer_takedown;
@@ -533,15 +515,10 @@ nouveau_card_init(struct drm_device *dev)
                nv_mask(dev, 0x00088080, 0x00000800, 0x00000000);
        }
 
-       /* PMC */
-       ret = engine->mc.init(dev);
-       if (ret)
-               goto out_bios;
-
        /* PTIMER */
        ret = engine->timer.init(dev);
        if (ret)
-               goto out_mc;
+               goto out_bios;
 
        /* PFB */
        ret = engine->fb.init(dev);
@@ -795,8 +772,6 @@ out_fb:
        engine->fb.takedown(dev);
 out_timer:
        engine->timer.takedown(dev);
-out_mc:
-       engine->mc.takedown(dev);
 out_bios:
        nouveau_bios_takedown(dev);
 out_display_early:
@@ -850,7 +825,6 @@ static void nouveau_card_takedown(struct drm_device *dev)
        engine->vram.takedown(dev);
        engine->fb.takedown(dev);
        engine->timer.takedown(dev);
-       engine->mc.takedown(dev);
 
        nouveau_bios_takedown(dev);
        engine->display.late_takedown(dev);