clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD UART

This patch adds CLK_IGNORE_UNUSED flag for sclk_aud_uart gate
clock for uart3 operation.

Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index 1d14d1cc12964a5f98638f1c720c09105d2d4340..be3658dc9049b9087c10e00677a68fb084688fe6 100644 (file)
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -2978,7 +2978,7 @@ static const struct samsung_gate_clock aud_gate_clks[] __initconst = {
        GATE(CLK_SCLK_AUD_SLIMBUS, "sclk_aud_slimbus", "div_sclk_aud_slimbus",
                        ENABLE_SCLK_AUD1, 4, 0, 0),
        GATE(CLK_SCLK_AUD_UART, "sclk_aud_uart", "div_sclk_aud_uart",
-                       ENABLE_SCLK_AUD1, 3, 0, 0),
+                       ENABLE_SCLK_AUD1, 3, CLK_IGNORE_UNUSED, 0),
        GATE(CLK_SCLK_AUD_PCM, "sclk_aud_pcm", "div_sclk_aud_pcm",
                        ENABLE_SCLK_AUD1, 2, 0, 0),
        GATE(CLK_SCLK_I2S_BCLK, "sclk_i2s_bclk", "ioclk_i2s_bclk",