ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:25:24 +0000 (22:25 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 22 May 2021 08:57:26 +0000 (10:57 +0200)
[ Upstream commit f6368c60561370e4a92fac22982a3bd656172170 ]

The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 47580e8d94c2 ("ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-8-krzk@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/exynos5250-smdk5250.dts

index 062cba4c2c310b28846634d354b10fe4d07e786c..5065e6bf37786a350c78051f55861fc076541a38 100644 (file)
                compatible = "maxim,max77686";
                reg = <0x09>;
                interrupt-parent = <&gpx3>;
-               interrupts = <2 IRQ_TYPE_NONE>;
+               interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-names = "default";
                pinctrl-0 = <&max77686_irq>;
                wakeup-source;