clk: rockchip: add missing include guards
authorHeiko Stuebner <heiko@sntech.de>
Sun, 5 Jul 2015 09:00:19 +0000 (11:00 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Mon, 6 Jul 2015 22:09:01 +0000 (15:09 -0700)
Review for the rk3368 turned up that the clock header was missing include
guards. This is also true for the already existing clock binding headers,
so add them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
include/dt-bindings/clock/rk3066a-cru.h
include/dt-bindings/clock/rk3188-cru-common.h
include/dt-bindings/clock/rk3188-cru.h
include/dt-bindings/clock/rk3288-cru.h

index bc1ed1dbd855667a7b0d62704544af1e4b3ea34d..d3a9824ef6462d775405b38fa41f7b31740d7508 100644 (file)
@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H
+
 #include <dt-bindings/clock/rk3188-cru-common.h>
 
 /* soft-reset indices */
@@ -33,3 +36,5 @@
 #define SRST_HDMI              96
 #define SRST_HDMI_APB          97
 #define SRST_CIF1              111
+
+#endif
index 6a370503c954e1466e124292fcac0d4584136c8d..8df77a7c030b0647abbf81e3a592c488f273638c 100644 (file)
@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_COMMON_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_COMMON_H
+
 /* core clocks from */
 #define PLL_APLL               1
 #define PLL_DPLL               2
 #define SRST_PTM1_ATB          141
 #define SRST_CTM               142
 #define SRST_TS                        143
+
+#endif
index 9fac8edd3f9df65523eaa42b6b02d5c19bdd984a..9f2e631f2651001327c7761d5c1fdc86cb4bf35b 100644 (file)
@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
+
 #include <dt-bindings/clock/rk3188-cru-common.h>
 
 /* soft-reset indices */
@@ -49,3 +52,5 @@
 #define SRST_GPU_BRIDGE                121
 #define SRST_CTI3              123
 #define SRST_CTI3_APB          124
+
+#endif
index dea419708d73ed112fd63a4c8bea747fd087e3ee..c719aacef14fb84f030603d5435a733f7dc2b1ba 100644 (file)
@@ -13,6 +13,9 @@
  * GNU General Public License for more details.
  */
 
+#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3288_H
+#define _DT_BINDINGS_CLK_ROCKCHIP_RK3288_H
+
 /* core clocks */
 #define PLL_APLL               1
 #define PLL_DPLL               2
 #define SRST_TSP_CLKIN0                189
 #define SRST_TSP_CLKIN1                190
 #define SRST_TSP_27M           191
+
+#endif