MIPS: MSP71xx: Use __flush_cache_all instead of flush_cache_all.
authorRalf Baechle <ralf@linux-mips.org>
Wed, 27 Jan 2016 17:16:15 +0000 (18:16 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 13 May 2016 12:01:38 +0000 (14:01 +0200)
Flushing caches is probably sensible on reset but flush_cache_all has been
a no-op for a very long time.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/pmcs-msp71xx/msp_setup.c

index 9d293b3e9130152af49f964e530ece27e482fd7b..a63b73610fd490d1c58293885b474e929f5bd1be 100644 (file)
@@ -118,7 +118,7 @@ void msp_restart(char *command)
        /* No chip-specific reset code, just jump to the ROM reset vector */
        set_c0_status(ST0_BEV | ST0_ERL);
        change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
-       flush_cache_all();
+       __flush_cache_all();
        write_c0_wired(0);
 
        __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));