*/
static inline void neo_clear_break(struct channel_t *ch, int force)
{
- ulong lock_flags;
+ unsigned long flags;
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
/* Bail if we aren't currently sending a break. */
if (!ch->ch_stop_sending_break) {
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
return;
}
ch->ch_stop_sending_break = 0;
}
}
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
}
struct channel_t *ch;
uchar isr;
uchar cause;
- ulong lock_flags;
+ unsigned long flags;
if (!brd || brd->magic != DGNC_BOARD_MAGIC)
return;
neo_copy_data_from_uart_to_queue(ch);
/* Call our tty layer to enforce queue flow control if needed. */
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
dgnc_check_queue_flow_control(ch);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
}
if (isr & UART_IIR_THRI) {
brd->intr_tx++;
ch->ch_intr_tx++;
/* Transfer data (if any) from Write Queue -> UART. */
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
neo_copy_data_from_queue_to_uart(ch);
}
if (cause == UART_17158_XON_DETECT) {
/* Is output stopped right now, if so, resume it */
if (brd->channels[port]->ch_flags & CH_STOP) {
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock,
+ flags);
ch->ch_flags &= ~(CH_STOP);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock,
+ flags);
}
} else if (cause == UART_17158_XOFF_DETECT) {
if (!(brd->channels[port]->ch_flags & CH_STOP)) {
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock,
+ flags);
ch->ch_flags |= CH_STOP;
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock,
+ flags);
}
}
}
/* Which pin is doing auto flow? RTS or DTR? */
if ((cause & 0x4) == 0) {
if (cause & UART_MCR_RTS) {
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock,
+ flags);
ch->ch_mostat |= UART_MCR_RTS;
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock,
+ flags);
} else {
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock,
+ flags);
ch->ch_mostat &= ~(UART_MCR_RTS);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock,
+ flags);
}
} else {
if (cause & UART_MCR_DTR) {
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock,
+ flags);
ch->ch_mostat |= UART_MCR_DTR;
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock,
+ flags);
} else {
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock,
+ flags);
ch->ch_mostat &= ~(UART_MCR_DTR);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock,
+ flags);
}
}
}
{
struct channel_t *ch;
int linestatus;
- ulong lock_flags;
+ unsigned long flags;
if (!brd)
return;
ch->ch_intr_rx++;
/* Read data from uart -> queue */
neo_copy_data_from_uart_to_queue(ch);
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
dgnc_check_queue_flow_control(ch);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
}
/*
if (linestatus & UART_LSR_THRE) {
brd->intr_tx++;
ch->ch_intr_tx++;
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
/* Transfer data (if any) from Write Queue -> UART. */
neo_copy_data_from_queue_to_uart(ch);
} else if (linestatus & UART_17158_TX_AND_FIFO_CLR) {
brd->intr_tx++;
ch->ch_intr_tx++;
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
/* Transfer data (if any) from Write Queue -> UART. */
neo_copy_data_from_queue_to_uart(ch);
{
struct dgnc_board *bd = (struct dgnc_board *) data;
struct channel_t *ch;
- ulong lock_flags;
+ unsigned long flags;
int i;
int state = 0;
int ports = 0;
}
/* Cache a couple board values */
- DGNC_LOCK(bd->bd_lock, lock_flags);
+ spin_lock_irqsave(&bd->bd_lock, flags);
state = bd->state;
ports = bd->nasync;
- DGNC_UNLOCK(bd->bd_lock, lock_flags);
+ spin_unlock_irqrestore(&bd->bd_lock, flags);
/*
* Do NOT allow the interrupt routine to read the intr registers
* Until we release this lock.
*/
- DGNC_LOCK(bd->bd_intr_lock, lock_flags);
+ spin_lock_irqsave(&bd->bd_intr_lock, flags);
/*
* If board is ready, parse deeper to see if there is anything to do.
}
/* Allow interrupt routine to access the interrupt register again */
- DGNC_UNLOCK(bd->bd_intr_lock, lock_flags);
+ spin_unlock_irqrestore(&bd->bd_intr_lock, flags);
}
int current_port;
u32 tmp;
u32 uart_poll;
- unsigned long lock_flags;
- unsigned long lock_flags2;
+ unsigned long flags;
+ unsigned long flags2;
if (!brd) {
APR(("Received interrupt (%d) with null board associated\n", irq));
brd->intr_count++;
/* Lock out the slow poller from running on this board. */
- DGNC_LOCK(brd->bd_intr_lock, lock_flags);
+ spin_lock_irqsave(&brd->bd_intr_lock, flags);
/*
* Read in "extended" IRQ information from the 32bit Neo register.
* This can happen if the IRQ is shared among a couple Neo/Classic boards.
*/
if (!uart_poll) {
- DGNC_UNLOCK(brd->bd_intr_lock, lock_flags);
+ spin_unlock_irqrestore(&brd->bd_intr_lock, flags);
return IRQ_NONE;
}
neo_copy_data_from_uart_to_queue(ch);
/* Call our tty layer to enforce queue flow control if needed. */
- DGNC_LOCK(ch->ch_lock, lock_flags2);
+ spin_lock_irqsave(&ch->ch_lock, flags2);
dgnc_check_queue_flow_control(ch);
- DGNC_UNLOCK(ch->ch_lock, lock_flags2);
+ spin_unlock_irqrestore(&ch->ch_lock, flags2);
continue;
*/
tasklet_schedule(&brd->helper_tasklet);
- DGNC_UNLOCK(brd->bd_intr_lock, lock_flags);
+ spin_unlock_irqrestore(&brd->bd_intr_lock, flags);
return IRQ_HANDLED;
}
int total = 0;
ushort head;
ushort tail;
- ulong lock_flags;
+ unsigned long flags;
if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
return;
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
/* cache head and tail of queue */
head = ch->ch_r_head & RQUEUEMASK;
ch->ch_r_head = head & RQUEUEMASK;
ch->ch_e_head = head & EQUEUEMASK;
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
}
*/
static int neo_drain(struct tty_struct *tty, uint seconds)
{
- ulong lock_flags;
+ unsigned long flags;
struct channel_t *ch;
struct un_t *un;
int rc = 0;
if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
return -ENXIO;
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
un->un_flags |= UN_EMPTY;
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
/*
* Go to sleep waiting for the tty layer to wake me back up when
int s;
int qlen;
uint len_written = 0;
- ulong lock_flags;
+ unsigned long flags;
if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
return;
- DGNC_LOCK(ch->ch_lock, lock_flags);
+ spin_lock_irqsave(&ch->ch_lock, flags);
/* No data to write to the UART */
if (ch->ch_w_tail == ch->ch_w_head) {
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
return;
}
/* If port is "stopped", don't send any data to the UART */
if ((ch->ch_flags & CH_FORCED_STOP) || (ch->ch_flags & CH_BREAK_SENDING)) {
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
return;
}
ch->ch_w_tail &= WQUEUEMASK;
ch->ch_txcount++;
}
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
return;
}
*/
if ((ch->ch_bd->dvid & 0xf0) < UART_XR17E158_DVID) {
if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) {
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
return;
}
n = readb(&ch->ch_neo_uart->tfifo);
if ((unsigned int) n > ch->ch_t_tlevel) {
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
return;
}
ch->ch_flags &= ~(CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
}
- DGNC_UNLOCK(ch->ch_lock, lock_flags);
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
}