arm64: dts: r8a7795: Add L2 cache-controller nodes

Add device nodes for the L2 caches, and link the CPU node to its L2
cache node.

The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as
128 KiB x 16 ways).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 9634e3a4858e60dadf28daf0a67e6e165fb0d753..3f00e85641a82a9b1841c6fda00228ab315d9b57 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -39,6 +39,7 @@
                        compatible = "arm,cortex-a57", "arm,armv8";
                        reg = <0x0>;
                        device_type = "cpu";
+                       next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
                };
 
@@ -46,22 +47,29 @@
                        compatible = "arm,cortex-a57","arm,armv8";
                        reg = <0x1>;
                        device_type = "cpu";
+                       next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
                };
                a57_2: cpu@2 {
                        compatible = "arm,cortex-a57","arm,armv8";
                        reg = <0x2>;
                        device_type = "cpu";
+                       next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
                };
                a57_3: cpu@3 {
                        compatible = "arm,cortex-a57","arm,armv8";
                        reg = <0x3>;
                        device_type = "cpu";
+                       next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
                };
        };
 
+       L2_CA57: cache-controller@0 {
+               compatible = "cache";
+       };
+
        extal_clk: extal {
                compatible = "fixed-clock";
                #clock-cells = <0>;