drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround
authorArun Siluvery <arun.siluvery@linux.intel.com>
Fri, 19 Jun 2015 17:37:12 +0000 (18:37 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 23 Jun 2015 12:01:41 +0000 (14:01 +0200)
In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_lrc.c

index f83d97ea40289fa85538f436e6793410c686138e..a1198baf34aaddbd98990e2e2d6ae49ff9bace58 100644 (file)
@@ -1140,8 +1140,8 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
 {
        uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);
 
-       /* FIXME: Replace me with WA */
-       wa_ctx_emit(batch, MI_NOOP);
+       /* WaDisableCtxRestoreArbitration:bdw,chv */
+       wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_DISABLE);
 
        /* Pad to end of cacheline */
        while (index % CACHELINE_DWORDS)
@@ -1179,6 +1179,9 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *ring,
 {
        uint32_t index = wa_ctx_start(wa_ctx, *offset, CACHELINE_DWORDS);
 
+       /* WaDisableCtxRestoreArbitration:bdw,chv */
+       wa_ctx_emit(batch, MI_ARB_ON_OFF | MI_ARB_ENABLE);
+
        wa_ctx_emit(batch, MI_BATCH_BUFFER_END);
 
        return wa_ctx_end(wa_ctx, *offset = index, 1);