[ARM SMP] Ensure secondary CPUs see their pen release
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Fri, 29 Jul 2005 15:36:48 +0000 (16:36 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 29 Jul 2005 15:36:48 +0000 (16:36 +0100)
Since the secondary CPUs will not be operating in symetric mode
while they are held in the pen, we need to ensure that the write
to pen_release is visible to them, by flushing the cache.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-integrator/platsmp.c

index aecf47ba033a753040646ec8779bd48767675261..ea10bd8c972c4bf4d6df17c0ef0faf77871f4f7f 100644 (file)
@@ -15,6 +15,7 @@
 #include <linux/mm.h>
 
 #include <asm/atomic.h>
+#include <asm/cacheflush.h>
 #include <asm/delay.h>
 #include <asm/mmu_context.h>
 #include <asm/procinfo.h>
@@ -80,6 +81,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
         * "cpu" is Linux's internal ID.
         */
        pen_release = cpu;
+       flush_cache_all();
 
        /*
         * XXX