phy: exynos: Use one define for enable bit
authorKrzysztof Kozlowski <krzk@kernel.org>
Wed, 29 Mar 2017 08:29:57 +0000 (13:59 +0530)
committerKishon Vijay Abraham I <kishon@ti.com>
Mon, 10 Apr 2017 11:13:18 +0000 (16:43 +0530)
There is no need for separate defines for Exynos4 and Exynos5 phy enable
bit and MIPI phy reset bits.  In both cases there are the same so
simplify it.

This reduces number of defines and allows removal of one header file.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/phy-exynos-dp-video.c
drivers/phy/phy-exynos-mipi-video.c
drivers/phy/phy-exynos5-usbdrd.c
include/linux/soc/samsung/exynos-regs-pmu.h

index d72193188980efc697ee01f1fc8c3f3edfc27097..bb3279dbf88c52fe71cbf0cc68a1eebf7905ae31 100644 (file)
@@ -14,7 +14,6 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/mfd/syscon.h>
-#include <linux/mfd/syscon/exynos5-pmu.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/phy/phy.h>
@@ -37,7 +36,7 @@ static int exynos_dp_video_phy_power_on(struct phy *phy)
 
        /* Disable power isolation on DP-PHY */
        return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset,
-                                 EXYNOS5_PHY_ENABLE, EXYNOS5_PHY_ENABLE);
+                                 EXYNOS4_PHY_ENABLE, EXYNOS4_PHY_ENABLE);
 }
 
 static int exynos_dp_video_phy_power_off(struct phy *phy)
@@ -46,7 +45,7 @@ static int exynos_dp_video_phy_power_off(struct phy *phy)
 
        /* Enable power isolation on DP-PHY */
        return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset,
-                                 EXYNOS5_PHY_ENABLE, 0);
+                                 EXYNOS4_PHY_ENABLE, 0);
 }
 
 static const struct phy_ops exynos_dp_video_phy_ops = {
index acef1d92691e6a173897e4dd1e31db26e139af95..c198886f80a34fd3bcb2fbfc12ca558c7fbe6e8d 100644 (file)
@@ -12,7 +12,6 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
-#include <linux/mfd/syscon/exynos5-pmu.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
@@ -64,7 +63,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = {
                {
                        /* EXYNOS_MIPI_PHY_ID_CSIS0 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0,
-                       .enable_val = EXYNOS4_MIPI_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = EXYNOS4_MIPI_PHY_SRESETN,
@@ -73,7 +72,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = {
                }, {
                        /* EXYNOS_MIPI_PHY_ID_DSIM0 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0,
-                       .enable_val = EXYNOS4_MIPI_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = EXYNOS4_MIPI_PHY_MRESETN,
@@ -82,7 +81,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = {
                }, {
                        /* EXYNOS_MIPI_PHY_ID_CSIS1 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1,
-                       .enable_val = EXYNOS4_MIPI_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = EXYNOS4_MIPI_PHY_SRESETN,
@@ -91,7 +90,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = {
                }, {
                        /* EXYNOS_MIPI_PHY_ID_DSIM1 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1,
-                       .enable_val = EXYNOS4_MIPI_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = EXYNOS4_MIPI_PHY_MRESETN,
@@ -109,46 +108,46 @@ static const struct mipi_phy_device_desc exynos5420_mipi_phy = {
                {
                        /* EXYNOS_MIPI_PHY_ID_CSIS0 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
-                       .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
+                       .resetn_val = EXYNOS4_MIPI_PHY_SRESETN,
                        .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
                        .resetn_map = EXYNOS_MIPI_REGMAP_PMU,
                }, {
                        /* EXYNOS_MIPI_PHY_ID_DSIM0 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
-                       .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN,
+                       .resetn_val = EXYNOS4_MIPI_PHY_MRESETN,
                        .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0),
                        .resetn_map = EXYNOS_MIPI_REGMAP_PMU,
                }, {
                        /* EXYNOS_MIPI_PHY_ID_CSIS1 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
-                       .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
+                       .resetn_val = EXYNOS4_MIPI_PHY_SRESETN,
                        .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
                        .resetn_map = EXYNOS_MIPI_REGMAP_PMU,
                }, {
                        /* EXYNOS_MIPI_PHY_ID_DSIM1 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
-                       .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN,
+                       .resetn_val = EXYNOS4_MIPI_PHY_MRESETN,
                        .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1),
                        .resetn_map = EXYNOS_MIPI_REGMAP_PMU,
                }, {
                        /* EXYNOS_MIPI_PHY_ID_CSIS2 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(2),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
-                       .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
+                       .resetn_val = EXYNOS4_MIPI_PHY_SRESETN,
                        .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(2),
                        .resetn_map = EXYNOS_MIPI_REGMAP_PMU,
                },
@@ -172,7 +171,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = {
                {
                        /* EXYNOS_MIPI_PHY_ID_CSIS0 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = BIT(0),
@@ -181,7 +180,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = {
                }, {
                        /* EXYNOS_MIPI_PHY_ID_DSIM0 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = BIT(0),
@@ -190,7 +189,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = {
                }, {
                        /* EXYNOS_MIPI_PHY_ID_CSIS1 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = BIT(1),
@@ -199,7 +198,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = {
                }, {
                        /* EXYNOS_MIPI_PHY_ID_DSIM1 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = BIT(1),
@@ -208,7 +207,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = {
                }, {
                        /* EXYNOS_MIPI_PHY_ID_CSIS2 */
                        .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
-                       .enable_val = EXYNOS5_PHY_ENABLE,
+                       .enable_val = EXYNOS4_PHY_ENABLE,
                        .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(2),
                        .enable_map = EXYNOS_MIPI_REGMAP_PMU,
                        .resetn_val = BIT(0),
index 7c896d0cda187d59ddfeaba41b73ff4c25002227..7c41daa2c625c9cab8fc3f53ef985c038b30983a 100644 (file)
@@ -22,7 +22,6 @@
 #include <linux/platform_device.h>
 #include <linux/mutex.h>
 #include <linux/mfd/syscon.h>
-#include <linux/mfd/syscon/exynos5-pmu.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
 #include <linux/soc/samsung/exynos-regs-pmu.h>
@@ -236,10 +235,10 @@ static void exynos5_usbdrd_phy_isol(struct phy_usb_instance *inst,
        if (!inst->reg_pmu)
                return;
 
-       val = on ? 0 : EXYNOS5_PHY_ENABLE;
+       val = on ? 0 : EXYNOS4_PHY_ENABLE;
 
        regmap_update_bits(inst->reg_pmu, inst->pmu_offset,
-                          EXYNOS5_PHY_ENABLE, val);
+                          EXYNOS4_PHY_ENABLE, val);
 }
 
 /*
index c261ed927e1ec0e6791730628f7aada5885c1b5d..bebdde5dccd69ff53112f12464ffa14ba7c971b7 100644 (file)
@@ -52,7 +52,8 @@
 
 /* MIPI_PHYn_CONTROL, valid for Exynos3250, Exynos4, Exynos5250 and Exynos5433 */
 #define EXYNOS4_MIPI_PHY_CONTROL(n)            (0x0710 + (n) * 4)
-#define EXYNOS4_MIPI_PHY_ENABLE                        (1 << 0)
+/* Phy enable bit, common for all phy registers, not only MIPI */
+#define EXYNOS4_PHY_ENABLE                     (1 << 0)
 #define EXYNOS4_MIPI_PHY_SRESETN               (1 << 1)
 #define EXYNOS4_MIPI_PHY_MRESETN               (1 << 2)
 #define EXYNOS4_MIPI_PHY_RESET_MASK            (3 << 1)