ARM: dts: support simple-audio-card for exynos5420 and exynos5422-odroidxu3

Add MAX98090 audio codec, I2S interface and the sound nodes
to support audio on exynos5422-odroidxu3 board. Now we can
support audio using simple-audio-card DT binding.

Signed-off-by: Inha Song <ideal.song@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 61a2a0d302c8b1e99b68eb70066eadacdd83e26b..8ab442158e158f6d336135bbbcef431a3fcd6982 100644 (file)
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -416,6 +416,9 @@
                        <&clock_audss EXYNOS_I2S_BUS>,
                        <&clock_audss EXYNOS_SCLK_I2S>;
                clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
+               #clock-cells = <1>;
+               clock-output-names = "i2s_cdclk0";
+               #sound-dai-cells = <1>;
                samsung,idma-addr = <0x03000000>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s0_bus>;
@@ -430,6 +433,9 @@
                dma-names = "tx", "rx";
                clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
                clock-names = "iis", "i2s_opclk0";
+               #clock-cells = <1>;
+               clock-output-names = "i2s_cdclk1";
+               #sound-dai-cells = <1>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s1_bus>;
                status = "disabled";
@@ -443,6 +449,9 @@
                dma-names = "tx", "rx";
                clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
                clock-names = "iis", "i2s_opclk0";
+               #clock-cells = <1>;
+               clock-output-names = "i2s_cdclk2";
+               #sound-dai-cells = <1>;
                pinctrl-names = "default";
                pinctrl-0 = <&i2s2_bus>;
                status = "disabled";

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index 23ed547fe706fe3c88e76f01e8621fab2c3604ca..6403757011bae7c8b9d66835e15d7edc7fda9a1f 100644 (file)
--- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
@@ -13,6 +13,7 @@
 /dts-v1/;
 #include <dt-bindings/clock/samsung,s2mps11.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/sound/samsung-i2s.h>
 #include "exynos5800.dtsi"
 
 / {
@@ -307,6 +308,64 @@
                        linux,default-trigger = "mmc1";
                };
        };
+
+       sound: sound {
+               compatible = "simple-audio-card";
+
+               simple-audio-card,name = "Odroid-XU3";
+               simple-audio-card,widgets =
+                       "Headphone", "Headphone Jack",
+                       "Speakers", "Speakers";
+               simple-audio-card,routing =
+                       "Headphone Jack", "HPL",
+                       "Headphone Jack", "HPR",
+                       "Headphone Jack", "MICBIAS",
+                       "IN1", "Headphone Jack",
+                       "Speakers", "SPKL",
+                       "Speakers", "SPKR";
+
+               simple-audio-card,format = "i2s";
+               simple-audio-card,bitclock-master = <&link0_codec>;
+               simple-audio-card,frame-master = <&link0_codec>;
+
+               simple-audio-card,cpu {
+                       sound-dai = <&i2s0 0>;
+                       system-clock-frequency = <19200000>;
+               };
+
+               link0_codec: simple-audio-card,codec {
+                       sound-dai = <&max98090>;
+                       clocks = <&i2s0 CLK_I2S_CDCLK>;
+               };
+       };
+};
+
+&clock_audss {
+       assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
+                       <&clock_audss EXYNOS_MOUT_I2S>,
+                       <&clock_audss EXYNOS_DOUT_AUD_BUS>;
+       assigned-clock-parents = <&clock CLK_FIN_PLL>,
+                       <&clock_audss EXYNOS_MOUT_AUDSS>;
+       assigned-clock-rates = <0>,
+                       <0>,
+                       <19200000>;
+};
+
+&hsi2c_5 {
+       status = "okay";
+       max98090: max98090@10 {
+               compatible = "maxim,max98090";
+               reg = <0x10>;
+               interrupt-parent = <&gpx3>;
+               interrupts = <2 0>;
+               clocks = <&i2s0 CLK_I2S_CDCLK>;
+               clock-names = "mclk";
+               #sound-dai-cells = <0>;
+       };
+};
+
+&i2s0 {
+       status = "okay";
 };
 
 &hdmi {