{
acpi_handle bridge_handle, parent_handle;
- if (!(bridge_handle = acpi_pci_get_bridge_handle(pbus)))
+ bridge_handle = acpi_pci_get_bridge_handle(pbus);
+ if (!bridge_handle)
return 0;
if ((ACPI_FAILURE(acpi_get_parent(handle, &parent_handle))))
return 0;
/* Unconfigure device */
dbg("%s - unconfiguring slot %s", __func__, slot_name(slot));
- if ((retval = cpci_unconfigure_slot(slot))) {
+ retval = cpci_unconfigure_slot(slot);
+ if (retval) {
err("%s - could not unconfigure slot %s",
__func__, slot_name(slot));
goto disable_error;
}
cpci_led_on(slot);
- if (controller->ops->set_power)
- if ((retval = controller->ops->set_power(slot, 0)))
+ if (controller->ops->set_power) {
+ retval = controller->ops->set_power(slot, 0);
+ if (retval)
goto disable_error;
+ }
if (update_adapter_status(slot->hotplug_slot, 0))
warn("failure to update adapter file");
dbg("registered controller");
/* Look for first device matching cPCI bus's bridge vendor and device IDs */
- if (!(bus0_dev = pci_get_device(PCI_VENDOR_ID_DEC,
- PCI_DEVICE_ID_DEC_21154, NULL))) {
+ bus0_dev = pci_get_device(PCI_VENDOR_ID_DEC,
+ PCI_DEVICE_ID_DEC_21154, NULL);
+ if (!bus0_dev) {
status = -ENODEV;
goto init_register_error;
}
debug("ENABLING SLOT........\n");
slot_cur = hs->private;
- if ((rc = validate(slot_cur, ENABLE))) {
+ rc = validate(slot_cur, ENABLE);
+ if (rc) {
err("validate function failed\n");
goto error_nopower;
}
for (i = 0; i < 16; i++)
irqs[i] = 0;
- if ((rc = ibmphp_access_ebda()))
+ rc = ibmphp_access_ebda();
+ if (rc)
goto error;
debug("after ibmphp_access_ebda()\n");
- if ((rc = ibmphp_rsrc_init()))
+ rc = ibmphp_rsrc_init();
+ if (rc)
goto error;
debug("AFTER Resource & EBDA INITIALIZATIONS\n");
max_slots = get_max_slots();
- if ((rc = ibmphp_register_pci()))
+ rc = ibmphp_register_pci();
+ if (rc)
goto error;
if (init_ops()) {
}
ibmphp_print_test();
- if ((rc = ibmphp_hpc_start_poll_thread()))
+ rc = ibmphp_hpc_start_poll_thread();
+ if (rc)
goto error;
exit:
case PCI_HEADER_TYPE_NORMAL:
debug ("single device case.... vendor id = %x, hdr_type = %x, class = %x\n", vendor_id, hdr_type, class);
assign_alt_irq (cur_func, class_code);
- if ((rc = configure_device (cur_func)) < 0) {
+ rc = configure_device(cur_func);
+ if (rc < 0) {
/* We need to do this in case some other BARs were properly inserted */
err ("was not able to configure devfunc %x on bus %x.\n",
cur_func->device, cur_func->busno);
break;
case PCI_HEADER_TYPE_MULTIDEVICE:
assign_alt_irq (cur_func, class_code);
- if ((rc = configure_device (cur_func)) < 0) {
+ rc = configure_device(cur_func);
+ if (rc < 0) {
/* We need to do this in case some other BARs were properly inserted */
err ("was not able to configure devfunc %x on bus %x...bailing out\n",
cur_func->device, cur_func->busno);
if ((curr->rsrc_type & RESTYPE) == MMASK) {
/* no bus structure exists in place yet */
if (list_empty (&gbuses)) {
- if ((rc = alloc_bus_range (&newbus, &newrange, curr, MEM, 1)))
+ rc = alloc_bus_range(&newbus, &newrange, curr, MEM, 1);
+ if (rc)
return rc;
list_add_tail (&newbus->bus_list, &gbuses);
debug ("gbuses = NULL, Memory Primary Bus %x [%x - %x]\n", newbus->busno, newrange->start, newrange->end);
return rc;
} else {
/* went through all the buses and didn't find ours, need to create a new bus node */
- if ((rc = alloc_bus_range (&newbus, &newrange, curr, MEM, 1)))
+ rc = alloc_bus_range(&newbus, &newrange, curr, MEM, 1);
+ if (rc)
return rc;
list_add_tail (&newbus->bus_list, &gbuses);
/* prefetchable memory */
if (list_empty (&gbuses)) {
/* no bus structure exists in place yet */
- if ((rc = alloc_bus_range (&newbus, &newrange, curr, PFMEM, 1)))
+ rc = alloc_bus_range(&newbus, &newrange, curr, PFMEM, 1);
+ if (rc)
return rc;
list_add_tail (&newbus->bus_list, &gbuses);
debug ("gbuses = NULL, PFMemory Primary Bus %x [%x - %x]\n", newbus->busno, newrange->start, newrange->end);
return rc;
} else {
/* went through all the buses and didn't find ours, need to create a new bus node */
- if ((rc = alloc_bus_range (&newbus, &newrange, curr, PFMEM, 1)))
+ rc = alloc_bus_range(&newbus, &newrange, curr, PFMEM, 1);
+ if (rc)
return rc;
list_add_tail (&newbus->bus_list, &gbuses);
debug ("1st Bus, PFMemory Primary Bus %x [%x - %x]\n", newbus->busno, newrange->start, newrange->end);
/* IO */
if (list_empty (&gbuses)) {
/* no bus structure exists in place yet */
- if ((rc = alloc_bus_range (&newbus, &newrange, curr, IO, 1)))
+ rc = alloc_bus_range(&newbus, &newrange, curr, IO, 1);
+ if (rc)
return rc;
list_add_tail (&newbus->bus_list, &gbuses);
debug ("gbuses = NULL, IO Primary Bus %x [%x - %x]\n", newbus->busno, newrange->start, newrange->end);
return rc;
} else {
/* went through all the buses and didn't find ours, need to create a new bus node */
- if ((rc = alloc_bus_range (&newbus, &newrange, curr, IO, 1)))
+ rc = alloc_bus_range(&newbus, &newrange, curr, IO, 1);
+ if (rc)
return rc;
list_add_tail (&newbus->bus_list, &gbuses);
debug ("1st Bus, IO Primary Bus %x [%x - %x]\n", newbus->busno, newrange->start, newrange->end);
}
} else {
/* in the same range */
- if ((len_tmp = res_cur->start - 1 - res_prev->end - 1) >= res->len) {
+ len_tmp = res_cur->start - 1 - res_prev->end - 1;
+
+ if (len_tmp >= res->len) {
if ((len_tmp < len_cur) || (len_cur == 0)) {
if (((res_prev->end + 1) % tmp_divide) == 0) {
/* just perfect, starting address's divisible by length */
break;
}
while (range) {
- if ((len_tmp = range->end - range->start) >= res->len) {
+ len_tmp = range->end - range->start;
+
+ if (len_tmp >= res->len) {
if ((len_tmp < len_cur) || (len_cur == 0)) {
if ((range->start % tmp_divide) == 0) {
/* just perfect, starting address's divisible by length */
break;
}
while (range) {
- if ((len_tmp = range->end - range->start) >= res->len) {
+ len_tmp = range->end - range->start;
+
+ if (len_tmp >= res->len) {
if ((len_tmp < len_cur) || (len_cur == 0)) {
if ((range->start % tmp_divide) == 0) {
/* just perfect, starting address's divisible by length */
int rc = 0;
ctrl_dbg(ctrl, "Change speed to %d\n", speed);
- if ((rc = p_slot->hpc_ops->set_bus_speed_mode(p_slot, speed))) {
+ rc = p_slot->hpc_ops->set_bus_speed_mode(p_slot, speed);
+ if (rc) {
ctrl_err(ctrl, "%s: Issue of set bus speed mode command failed\n",
__func__);
return WRONG_BUS_FREQUENCY;
}
if ((ctrl->pci_dev->vendor == 0x8086) && (ctrl->pci_dev->device == 0x0332)) {
- if ((rc = p_slot->hpc_ops->set_bus_speed_mode(p_slot, PCI_SPEED_33MHz))) {
+ rc = p_slot->hpc_ops->set_bus_speed_mode(p_slot, PCI_SPEED_33MHz);
+ if (rc) {
ctrl_err(ctrl, "%s: Issue of set bus speed mode command failed\n",
__func__);
return WRONG_BUS_FREQUENCY;
}
/* turn on board, blink green LED, turn off Amber LED */
- if ((rc = p_slot->hpc_ops->slot_enable(p_slot))) {
+ rc = p_slot->hpc_ops->slot_enable(p_slot);
+ if (rc) {
ctrl_err(ctrl, "Issue of Slot Enable command failed\n");
return rc;
}
return rc;
/* turn on board, blink green LED, turn off Amber LED */
- if ((rc = p_slot->hpc_ops->slot_enable(p_slot))) {
+ rc = p_slot->hpc_ops->slot_enable(p_slot);
+ if (rc) {
ctrl_err(ctrl, "Issue of Slot Enable command failed\n");
return rc;
}
u8 m66_cap = !!(slot_reg & MHZ66_CAP);
u8 pi, pcix_cap;
- if ((retval = hpc_get_prog_int(slot, &pi)))
+ retval = hpc_get_prog_int(slot, &pi);
+ if (retval)
return retval;
switch (pi) {
for (i = 0; i < 16; i++)
pci_read_config_dword(dev, i * 4, &dev->saved_config_space[i]);
dev->state_saved = true;
- if ((i = pci_save_pcie_state(dev)) != 0)
+
+ i = pci_save_pcie_state(dev);
+ if (i != 0)
return i;
- if ((i = pci_save_pcix_state(dev)) != 0)
+
+ i = pci_save_pcix_state(dev);
+ if (i != 0)
return i;
- if ((i = pci_save_vc_state(dev)) != 0)
+
+ i = pci_save_vc_state(dev);
+ if (i != 0)
return i;
+
return 0;
}
EXPORT_SYMBOL(pci_save_state);