#define DRV_NAME "pata_sil680"
#define DRV_VERSION "0.4.6"
+#define SIL680_MMIO_BAR 5
+
/**
* sil680_selreg - return register base
* @hwif: interface
pci_read_config_byte(pdev, 0x8A, &tmpbyte);
- printk(KERN_INFO "sil680: BA5_EN = %d clock = %02X\n",
- tmpbyte & 1, tmpbyte & 0x30);
+ dev_dbg(&pdev->dev, "sil680: BA5_EN = %d clock = %02X\n",
+ tmpbyte & 1, tmpbyte & 0x30);
switch(tmpbyte & 0x30) {
case 0x00:
}
pci_read_config_byte(pdev, 0x8A, &tmpbyte);
- printk(KERN_INFO "sil680: BA5_EN = %d clock = %02X\n",
- tmpbyte & 1, tmpbyte & 0x30);
+ dev_dbg(&pdev->dev, "sil680: BA5_EN = %d clock = %02X\n",
+ tmpbyte & 1, tmpbyte & 0x30);
pci_write_config_byte(pdev, 0xA1, 0x72);
pci_write_config_word(pdev, 0xA2, 0x328A);
return tmpbyte & 0x30;
}
-static int sil680_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
+static int __devinit sil680_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *id)
{
static const struct ata_port_info info = {
.sht = &sil680_sht,