xhci: Add roothub code to set U1/U2 timeouts.
authorSarah Sharp <sarah.a.sharp@linux.intel.com>
Fri, 11 Nov 2011 00:02:13 +0000 (16:02 -0800)
committerSarah Sharp <sarah.a.sharp@linux.intel.com>
Fri, 18 May 2012 22:41:52 +0000 (15:41 -0700)
USB 3.0 hubs can be put into a mode where the hub can automatically
request that the link go into a deeper link power state after the link
has been idle for a specified amount of time.  Each of the new USB 3.0
link states (U1 and U2) have their own timeout that can be programmed
per port.

Change the xHCI roothub emulation code to handle the request to set the
U1 and U2 timeouts.

Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
drivers/usb/host/xhci-hub.c
drivers/usb/host/xhci.h

index 89850a82d51bac7c9bf74f1644937aa372b93ac4..2732ef660c5c08b85baeb38c23d5ec597bf15673 100644 (file)
@@ -475,6 +475,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
        struct xhci_bus_state *bus_state;
        u16 link_state = 0;
        u16 wake_mask = 0;
+       u16 timeout = 0;
 
        max_ports = xhci_get_ports(hcd, &port_array);
        bus_state = &xhci->bus_state[hcd_index(hcd)];
@@ -623,6 +624,8 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
                        link_state = (wIndex & 0xff00) >> 3;
                if (wValue == USB_PORT_FEAT_REMOTE_WAKE_MASK)
                        wake_mask = wIndex & 0xff00;
+               /* The MSB of wIndex is the U1/U2 timeout */
+               timeout = (wIndex & 0xff00) >> 8;
                wIndex &= 0xff;
                if (!wIndex || wIndex > max_ports)
                        goto error;
@@ -747,6 +750,22 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
 
                        temp = xhci_readl(xhci, port_array[wIndex]);
                        break;
+               case USB_PORT_FEAT_U1_TIMEOUT:
+                       if (hcd->speed != HCD_USB3)
+                               goto error;
+                       temp = xhci_readl(xhci, port_array[wIndex] + 1);
+                       temp &= ~PORT_U1_TIMEOUT_MASK;
+                       temp |= PORT_U1_TIMEOUT(timeout);
+                       xhci_writel(xhci, temp, port_array[wIndex] + 1);
+                       break;
+               case USB_PORT_FEAT_U2_TIMEOUT:
+                       if (hcd->speed != HCD_USB3)
+                               goto error;
+                       temp = xhci_readl(xhci, port_array[wIndex] + 1);
+                       temp &= ~PORT_U2_TIMEOUT_MASK;
+                       temp |= PORT_U2_TIMEOUT(timeout);
+                       xhci_writel(xhci, temp, port_array[wIndex] + 1);
+                       break;
                default:
                        goto error;
                }
index ac142760fd3bdd82891e30b77c001ecfecac0b1d..58d527ccb24a3fc60fc53636086db927aad399bd 100644 (file)
@@ -362,8 +362,10 @@ struct xhci_op_regs {
  * Timeout can be up to 127us.  0xFF means an infinite timeout.
  */
 #define PORT_U1_TIMEOUT(p)     ((p) & 0xff)
+#define PORT_U1_TIMEOUT_MASK   0xff
 /* Inactivity timer value for transitions into U2 */
 #define PORT_U2_TIMEOUT(p)     (((p) & 0xff) << 8)
+#define PORT_U2_TIMEOUT_MASK   (0xff << 8)
 /* Bits 24:31 for port testing */
 
 /* USB2 Protocol PORTSPMSC */