This errata covers all r1 variants of Cortex A8, it's not limited to
just r1p0..r1p2. Update the documentation to reflect this. The code
already applies the workaround to all r1p* A8 CPUs.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
depends on CPU_V7
help
This option enables the workaround for the 430973 Cortex-A8
- (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
+ r1p* erratum. If a code sequence containing an ARM/Thumb
interworking branch is replaced with another code sequence at the
same virtual address, whether due to self-modifying code or virtual
to physical address re-mapping, Cortex-A8 does not recover from the