drm/nouveau/mc/nv17: define reset masks + intr cleanup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
index 97abccb66fea726eaa3603ba843c156abe714b82..fb8f36f3554f80feef451e35888b2b6d8baeb252 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
@@ -14,6 +14,7 @@ void nvkm_mc_reset(struct nvkm_mc *, enum nvkm_devidx);
 void nvkm_mc_unk260(struct nvkm_mc *, u32 data);
 
 int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
+int nv17_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int g84_mc_new(struct nvkm_device *, int, struct nvkm_mc **);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 3fd32076838bce0ae7c55bc3a3fb48f6141cabcb..5c96bd9808dd32f826aebb0eb886d2eaf1b282c9 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -190,7 +190,7 @@ nv17_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -212,7 +212,7 @@ nv18_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -256,7 +256,7 @@ nv1f_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -278,7 +278,7 @@ nv20_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -300,7 +300,7 @@ nv25_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -322,7 +322,7 @@ nv28_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -344,7 +344,7 @@ nv2a_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -366,7 +366,7 @@ nv30_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -388,7 +388,7 @@ nv31_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -411,7 +411,7 @@ nv34_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -434,7 +434,7 @@ nv35_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -456,7 +456,7 @@ nv36_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
@@ -479,7 +479,7 @@ nv40_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,
@@ -505,7 +505,7 @@ nv41_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv41_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,
@@ -531,7 +531,7 @@ nv42_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv41_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,
@@ -557,7 +557,7 @@ nv43_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv41_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,
@@ -609,7 +609,7 @@ nv45_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,
@@ -661,7 +661,7 @@ nv47_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv41_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,
@@ -687,7 +687,7 @@ nv49_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv41_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,
@@ -739,7 +739,7 @@ nv4b_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv40_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv17_mc_new,
        .mmu = nv41_mmu_new,
        .pci = nv40_pci_new,
        .therm = nv40_therm_new,

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c
index ebf36a7bf1697ee55e269a772073e3a63661b725..c40fa67f79a51d3d122a77011824ad34e591e3f0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c
@@ -30,3 +30,30 @@ nv17_mc_reset[] = {
        { 0x00000002, NVKM_ENGINE_MPEG },
        {}
 };
+
+const struct nvkm_mc_map
+nv17_mc_intr[] = {
+       { 0x03010000, NVKM_ENGINE_DISP },
+       { 0x00001000, NVKM_ENGINE_GR },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x00000001, NVKM_ENGINE_MPEG },
+       { 0x10000000, NVKM_SUBDEV_BUS },
+       { 0x00100000, NVKM_SUBDEV_TIMER },
+       {}
+};
+
+static const struct nvkm_mc_func
+nv17_mc = {
+       .init = nv04_mc_init,
+       .intr = nv17_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
+       .reset = nv17_mc_reset,
+};
+
+int
+nv17_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       return nvkm_mc_new_(&nv17_mc, device, index, pmc);
+}

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
index 9a3ac9965be06255722b288abbf97037fbf1842e..cc56271db5643695add777bad34059c27d7f9b49 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
@@ -40,10 +40,11 @@ nv44_mc_init(struct nvkm_mc *mc)
 static const struct nvkm_mc_func
 nv44_mc = {
        .init = nv44_mc_init,
-       .intr = nv04_mc_intr,
+       .intr = nv17_mc_intr,
        .intr_unarm = nv04_mc_intr_unarm,
        .intr_rearm = nv04_mc_intr_rearm,
        .intr_mask = nv04_mc_intr_mask,
+       .reset = nv17_mc_reset,
 };
 
 int

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
index bfc6befa9cac62ce0f8634146e2b4c9bcdc86760..343b6078580de8bee982c56c267db9d48a6858a0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
@@ -51,6 +51,7 @@ nv50_mc = {
        .intr_unarm = nv04_mc_intr_unarm,
        .intr_rearm = nv04_mc_intr_rearm,
        .intr_mask = nv04_mc_intr_mask,
+       .reset = nv17_mc_reset,
 };
 
 int

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
index e8e361487dab485bf9a3006879ea91676527c602..57d3e39be881e8b1a747c454cca53451c07f1696 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
@@ -30,6 +30,7 @@ void nv04_mc_intr_unarm(struct nvkm_mc *);
 void nv04_mc_intr_rearm(struct nvkm_mc *);
 u32 nv04_mc_intr_mask(struct nvkm_mc *);
 
+extern const struct nvkm_mc_map nv17_mc_intr[];
 extern const struct nvkm_mc_map nv17_mc_reset[];
 
 void nv44_mc_init(struct nvkm_mc *);