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drm/amdgpu: Configure doorbell to maximum slots
author
Ben Goz
<ben.goz@amd.com>
Fri, 12 Jun 2015 08:08:58 +0000
(11:08 +0300)
committer
Alex Deucher
<alexander.deucher@amd.com>
Mon, 29 Jun 2015 15:21:40 +0000
(11:21 -0400)
Signed-off-by: Ben Goz <ben.goz@amd.com>
Acked-by: Oded Gabbay <oded.gabbay@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
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diff --git
a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index e4aeb74d259973dc01499f2bc996a70f1c598499..7683d7fd64631dc11350ddfab73880fbe42be509 100644
(file)
--- a/
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@
-3128,7
+3128,7
@@
static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
AMDGPU_DOORBELL_KIQ << 2);
WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,
-
AMDGPU_DOORBELL_MEC_RING7
<< 2);
+
0x7FFFF
<< 2);
}
tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,